What is RISC-V? How is it different than other RISC processors like Xtensa processors architecture?

RISC-V is a new ISA?
Or its a new processor architecture?

RISC-V is technically very similar to earlier RISC ISAs including MIPS, Power, Alpha, Aarch64 (actually they were developed in parallel) and yes Xtensa too. The designers of RISC-V tried to (and I think succeeded) in avoiding some mistakes of earlier RISC ISAs such as register windows or mandated branch or load delay slots.

But on the whole, the difference with RISC-V is not technical (it’s roughly the same as the best of the others), but in the fact that no one owns it, everyone in the world is free to make and use or sell their own implementation, and everyone gets to share in the rapidly growing software ecosystem. And there is no danger of your investment in RISC-V being orphaned because the company that owns it gets bored with it, changes to something new and incompatible, raises prices a lot, or goes out of business.