I was trying to implement semihosting in a Nexys A7 board using a sample program with riscv-openocd with the Sifive toolchain. While debugging the board goes to exception at the first printf() line.
Using the command “monitor arm semihosting enable” seems to enable semihosting in openocd, but doesn’t produce printf output in the Debugger console.
Is riscv openocd supported in the Sifive boards? If there is, anywhere I could find a sample implementation of it?
Are there any additional code or libraries required for semi hosting to be implemented?