Hi,
On this page: SiFive Insight - Advanced Trace & Debug IP, it is mentioned that Sifive riscv core can coexist with ARM coresight, does this means riscv can be used along with ARM coresight DAP considering riscv connected to a APB Port ? How debug in this case will work as riscv has different debug architecture as compare to ARM.
Does openocd support riscv debug connected to ARM coresight DAP ? There is a Sifive openocd github Security Overview · sifive/riscv-openocd · GitHub but not sure what all it supports or it is just fork of actual openocd riscv branch.