Hello, everybody.
I have to evaluate the performance of RISC-V without any RISC-V hardware.
From https://riscv.org/software-status/#simulators, there are many type of RISC-V simulators.
But which one can give me the timing/cycle accurate simulation result of a program running on it ?
I know some DSP simulator like TI or CEVA can give developer the accurate cycles of a C function,
I also need the same tool for RISC-V.
Thanks a lot.
For cycle accurate results, you normally have to get the rtl for a particular hardware design, and then use a hardware simulator like verilator on that rtl. These kinds of simulators are slow. Most of the simulators are ISA simulators, and will not give cycle accurate results, as they just emulate the ISA not the hardware. This kinds of simulators are much faster than hardware simulators.
Different hardware designs will have different cycle counts for different instructions, so you can’t get cycle accurate results without some kind of target specific hardware model.
The MARSS-RISCV simulator claims to give cycle accurate results, but I don’t know what kind of hardware models they are using, and I’ve never tried to use it. It is open software though so may be easy to try.
In case it wasn’t clear from Jim’s answer, there is no single “RISC-V CPU”. There are many companies, organisations, and individuals designing CPU cores that use the RISC-V instruction set, of which SiFive is only one.
Even at SiFive we currently have three very different RISC-V microarchitectures with very different performance characteristics (and also very different numbers of transistors and silicon area).