VCU118 U500 Implementation

Archive Freedom U500
1

Hi,
I have a bare vcu118 board. There are no other sub card and PMOD. I commented out the following code:
//val fmc = Overlay(PCIeOverlayKey) (new PCIeVCU118FMCOverlay (_, _, ))
//val edge = Overlay(PCIeOverlayKey) (new PCIeVCU118EdgeOverlay (, _, _))

Execute makefile of “Makefile.vcu118-u500devkit” to compile bit file, but after downloading, the uart has no output.
The version of vivado in the compilation environment is 2018.2.
Thank you.

2

I added ILA to vivado project to catch the signal. Here I only catch io_cpu_npc in class FrontendModule, and the result is as shown in the figure.

%E5%9B%BE%E7%89%87
%E5%9B%BE%E7%89%87954×278 9.25 KB

%E5%9B%BE%E7%89%87
%E5%9B%BE%E7%89%87982×323 11 KB

That is, the PC address has been cycling between 0000000000 and 0000000010.

Please help to analyze the reason, thank you!