Vague interrupt completion path in PLIC specifications


(Rajnesh Kanwal) #1

In PLIC specifications given here https://github.com/riscv/riscv-plic-spec/blob/master/riscv-plic.adoc under “Interrupt claim process” heading one can see the clause:

The PLIC can perform an interrupt claim by reading the claim/complete register, which returns the ID of the highest priority pending interrupt or zero if there is no pending interrupt. A successful claim will also atomically clear the corresponding pending bit on the interrupt source.

and at the same time there is a heading “Interrupt completion” just below it that states:

The PLIC signals it has completed executing an interrupt handler by writing the interrupt ID it received from the claim to the claim/complete register. The PLIC does not check whether the completion ID is the same as the last claim ID for that target. If the completion ID does not match an interrupt source that is currently enabled for the target, the completion is silently ignored.

My question: Why is there need for interrupt completion when the claim process already clears the interrupt pending bit? I don’t see any value in the interrupt completion part of the specs after interrupt claim process.

Thanks