LoFive RISC-V

You have interpreted the picture correctly, it is painful:
https://plus.google.com/u/0/photos/113130211987114395265/album/6523249489607412561/6523249491956228594

This is the age of reasonably priced PCB Fabricators :wink:

I got a few as the minimum order was 5 PCB’s, (only needed one) so I could send you one if you wanted. Have to wait till I get back to base next week.

3 Likes

Should have said that the jumpers are for +5Volts and the Rx and Tx of the UART. That PCB just plugs into the breadboard with room around it to play. The connector on the end was meant as an In Circuit Programmer but I’ve not tested it yet

Wow!! That is sweet!!

I thought I was doing good with my fancy, custom cables.
You took it to the next level :wink:

I can verify that JTAG programming the LoFive works well with Raspberry Pi 1 model B:

$ cat /proc/cpuinfo 
processor	: 0
model name	: ARMv6-compatible processor rev 7 (v6l)
BogoMIPS	: 697.95
Features	: half thumb fastmult vfp edsp java tls 
CPU implementer	: 0x41
CPU architecture: 7
CPU variant	: 0x0
CPU part	: 0xb76
CPU revision	: 7

Hardware	: BCM2835
Revision	: 0002

$ uname -a
Linux raspberrypi 4.9.59+ #1047 Sun Oct 29 11:47:10 GMT 2017 armv6l GNU/Linux

OpenOCD compiled as per above:

cd riscv-openocd
./bootstrap
./configure --disable-werror --prefix=/opt/riscv --enable-sysfsgpio --enable-bcm2835gpio
make
make install

Configuration for OpenOCD:

$ cat lofive.cfg
#Use bcm2835gpio

interface bcm2835gpio
transport select jtag
adapter_khz 1000
bcm2835gpio_peripheral_base 0x20000000
bcm2835gpio_speed_coeffs 113714 28
bcm2835gpio_jtag_nums 11 25 10 9
bcm2835gpio_trst_num 7


#Use sysfsgpio

#interface sysfsgpio
#transport select jtag
#sysfsgpio_jtag_nums 11 25 10 9
#sysfsgpio_trst_num 7


set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1

flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
init
if {[ info exists pulse_srst]} {

  sleep 1500
}
halt

Run OpenOCD:

$ sudo /opt/riscv/bin/openocd -f lofive.cfg

Manually flash elf:

$ ./freedom-e-sdk/work/build/riscv-gnu-toolchain/riscv64-unknown-elf/prefix/bin/riscv64-unknown-elf-gdb led_fade

Then the following gdb commands:

set remotetimeout 240
target extended-remote localhost:3333
monitor reset halt
monitor flash protect 0 64 last off
load
monitor resume

Note: If OpenOCD halts at 0x0 as it did for me it probably means no bootloader is installed:

Open On-Chip Debugger 0.10.0+dev-00103-g352e6b82 (2018-02-20-07:30)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1000 kHz
BCM2835 GPIO config: tck = 11, tms = 25, tdi = 10, tdo = 9
BCM2835 GPIO config: trst = 7
Info : BCM2835 GPIO JTAG/SWD bitbang driver
Info : JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)
Info : clock speed 1006 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x10e31913 (mfg: 0x489 (SiFive, Inc.), part: 0x0e31, ver: 0x1)
Info : Examined RISCV core; XLEN=32, misa=0x40001105
Info : Listening on port 3333 for gdb connections
Info : [0] Found 2 triggers
halted at 0x0 due to debug interrupt

Compile bootloader (double_tap_dontboot):

cd freedom-e-sdk
make software PROGRAM=double_tap_dontboot BOARD=freedom-e300-lofive-blank

Flash bootloader as per above but replace the flash write protection unlock with:

monitor flash protect 0 0 last off

Both the native and sysfsgpio worked with the native performing well despite being an old pi.

1 Like