Let me give more information about my setup.
- I have compiled the freedom repository using the vc707-iofpga build (run first “make -f Makefile.vc707-iofpga verilog” then run “make -f Makefile.vc707-iofpga mcs”).
- Modified the generated vivado (ver.16.4) project to match the KCU105 board (modified the generated verilog file in order to replace the DRAM controller and modify the constraint to match the corresponding pins of chiplink, DRAM, system clock, leds, buttons e.t.c.).
- Generate bitstream.
Create the sd-card image for the unleashed board, following the instructions of unleashed getting started PDF.
Check if the unleashed board works OK without the connection with the KCU105 fpga board:
Insert the card to the unleashed board and power-ON the unleashed board alone. Board boots OK.
Putting it all together:
- Plug the unleashed board to the FMC of the KCU105 board and make sure the ext. 12v power supply is disconnected. Power switch of the unleashed Board is OFF.
- Power-on the KCU105 board and download the bitstream through jtag.
- Turn ON the power switch on the SIfive unleashed board.
- No uart output. Also checked the alternative uart output (the one from GPIO pins: UART0_TX, UART0_RX 1.8volt), again no-output.
Chipscope debug (as mentioned in my previous reply and some additional info): corePLL is locked, rxPLL is unlocked, ereset_n is high, rxPLL reset is low, power good of the unleashed board is high (fpga input from the PG_M2C FMC pin), chiplink tx clock from the fpga to the unleashed board is OK. Conclusion so far: the output lock signal of rxPLL is low which means that the incoming rx clock from the unleashed board to the fpga is dead.
fpga board leds: led[1:0] are toggleing, the led is always ON
I have repeated the previous steps also using as baseline HW design the VCU118 (vivado 18.2), again the same results.
Further info (terminal output when the unleashed board is not connected to the KCU105 fpga board):
SiFive FSBL: 2018-03-20
HiFive-U serial #: 0000017a
Build commit hashes: