Files for U500 on VC707


I’ve been working on getting linux to boot with U500 on the VC707. When I run screen to talk to the FPGA, I get the following output:


This keeps looping, instead of ever displaying the initial SiFive logo as in the Getting Started Guide. I’m using the Vivado Lab Edition 2016.4 and the files downloaded from to program the device. On my SD card, I’ve built the git repository and put the resulting bbl.bin file (~7MB).

At this point, it is hard to determine where my setup is failing, so I was wondering if it would be possible for me to download the built version of all three of these files that already work on a VC707 to try. If not, I would appreciate some guidance on where to look to debug my setup.

(Wesley W. Terpstra) #2

How did you put the bbl.bin onto the SD card? You wrote it directly to the device? (i.e.: not put it as a regular file on there)

Hmm. I’m looking at the freedom-u repo and it looks like master might have run ahead of what the released mcs file; current master has SMP boot. Could I send you privately a different mcs file to try?

(Wesley W. Terpstra) #3

Also, do you have the HiTechGlobal adapter attached? Or any other hardware differences from our demo setup?


I used dd to get the bbl.bin onto the SD card, as in the getting started guide. My setup has the PCIe card and the VC707 only, without any optional components.

If you could send me the working files, that would be much appreciated.

(Yusuf İbrahim ÖZKÖK) #5

Hi terpstra,

I’m exactly on the same point as dig described. If you can share precompiled binaries we can at leasth verify our setup. And is there any guide for low level debugging from initial instructions fetched.

Thank you,
best wishes…