If I try and upload to the board, I get the following errors:
Failed to execute MI command:
tbreak main
Error message from debugger back end:
Cannot access memory at address 0x20010188
Failed to execute MI command:
tbreak main
Error message from debugger back end:
Cannot access memory at address 0x20010188
Cannot access memory at address 0x20010188
I have already installed the Jlink drivers and software. If I type “lsusb” into my terminal, I can clearly see my device enumerating as a JLink USB device:
Bus 001 Device 011: ID 1366:1051 SEGGER
Is there anything I can do to troubleshoot this? Or is my board simply dead? I can load the serial terminal just fine, and I see the SiFive welcome text as I should. I just can’t upload to the board.
Sorry I haven’t responded. I haven’t given up. I’m putting together a giant log of useful stuff, but for the time being heres some info:
OS: Linux (Arch)
Command: I’ve tried uploading via FreedomStudio IDE and the command line. Heres the actual command:
make BSP=metal [PROGRAM=hello] [TARGET=sifive-hifive1-revb] upload
The errors I get when I run that are here:
/bin/sh: riscv64-unknown-elf-gcc: command not found
make[1]: *** [Makefile:982: src/drivers/libriscv__mmachine__sifive-hifive1_a-fixed-clock.o] Error 127
make[1]: Leaving directory ‘/home/penguin/FreedomStudio/SiFive/freedom-e-sdk/freedom-e-sdk-v201903/bsp/sifive-hifive1/build/debug’
make: *** [scripts/libmetal.mk:34: /home/penguin/FreedomStudio/SiFive/freedom-e-sdk/freedom-e-sdk-v201903/bsp/sifive-hifive1/install/lib/debug/stamp] Error 2
I have the riscv toolchain. I just dont know what I need to export its location as.
Alright I look like an idiot, and I probably am one, BUT I have some context to this. Originally I had the riscv64-unknown-elf-gcc + riscv64-unknown-elf-binutils installed from AUR. Apparently these don’t work with the revb (or sifive boards in general?). So I uninstalled this, and I did as you said and now I think I’m just stuck on getting jlink to push from the terminal. So I think my problems are solved. Thank you!
Nevermind, I also got jlink uploading to work, thanks to yksflip
A generic gcc toolchain will work fine for application code on SiFive chips and boards, including the HiFive1 RevB.
In particular I think only a generic toolchain is needed for the old v1_0 branch of the freedom-e-sdk. Sadly we don’t have a BSP for the RevB there.
The new “Metal” library in the master branch of freedom-e-sdk (where we do have a BSP for the RevB) directly refers to some interrupt controller CSRs that are proposed to be a future RISC-V standard, but aren’t yet, and generic gcc doesn’t yet know about them.
Sorry, the AUR is the Arch User Repository.
When running this command with the toolchain from the AUR: “make BSP=metal [PROGRAM=hello] [TARGET=sifive-hifive1-revb] upload”