How to flush/invalidate cache?


#1

I am developing for HiFive Unleashed board.

I have samll question.

How to flush or invaldate L1 cache?
and How to invalidate L2 cahce?

On FU540-C000-v1.0.pdf written, Flush64/Flush32 on Level2 Cache only.


(Wesley W. Terpstra) #2

The Flush64/Flush32 invalidate both the L1+L2.


#3

Do Flush64/Flush32 invalidate(discard) operation only?
or
Can Flush64/Flush32 flush(write-back) operation, too?

Another words,
How to invalidate(discard) cache L1 and L2?
and
How to flush(write back) cache L1 and L2?


(Wesley W. Terpstra) #4

Cached memory is always kept coherent. When you use Flush32/64, the caches will write-back any dirty data to DDR. After the invocation of Flush32/64, the block will not be present in any of the L2/L1 caches; ie, the cache state is invalid.


#5

In conclusion, can not perform operations that only invalidate the cache?
(Ex: to use allocate DMA memory.)


(Wesley W. Terpstra) #6

If by “invalidate” you mean “discard dirty data”, then this is not possible. DMA on SiFive chips is always coherent.


#7

DMA on SiFive chips is always coherent.

Really? I was mistaken.
Then, not need to operation for cache with DMA transfer.

Thank you for all.