How to configure a separate clock for cores and bus?


(Aleksandr) #1

After this commit https://github.com/freechipsproject/rocket-chip/commit/2632d1e64b84e8a18b53dcdab5873b1a3b4c5d92 tile_inputs has changed, so the way to add pins to the RocketSubsystemModuleImp class no longer works. How can you do it now?
Early I do like here https://github.com/LvNA-system/labeled-RISC-V/blob/master/src/main/scala/subsystem/RocketSubsystem.scala