FU740/FU540 Documentation errata?

HiFive Unmatched
1

Section 23.3 Reset and Initialization of the HiFive Unmatched manual includes the following:

  1. The DDR PHY configuration registers from address 0x100B_5200 to 0x100B_52F8
    are set.
  2. The DDR PHY configuration registers from address 0x100B_4000 to 0x100B_51FC
    are set.

But these addresses are marked as Reserved in the memory map.

Is the initialization description correct, and this is an undocumented area of the memory map, or is the description perhaps wrong about the locations that are accessed?

(The FU540 manual has the same reference, but when I run the FSBL code in demo-coreip-cli-freedom-u540-2021.03.01.rootfs.wic on the Imperas simulator FU540 model I do not see these locations accessed)

2

For HiFive Unleashed bootloader, we have
https://github.com/sifive/freedom-u540-c000-bootloader/blob/master/sifive/platform.h#L171
which agrees with the memory map. I don’t know where this code lives in current sources though. I’ve asked for someone to look at this.

3

I was curious, so after a bit of searching, I found
https://github.com/sifive/meta-sifive/blob/2021.03/recipes-bsp/u-boot/files/unmatched/0017-riscv-sifive-dts-fu740-add-U-Boot-dmc-node.patch
and this upstream for fu540
https://source.denx.de/u-boot/u-boot/-/blob/master/arch/riscv/dts/fu540-c000-u-boot.dtsi#L78

I filed an internal bug report.

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