Approaching the specification documentation, even one as concise as RISC-V, can be imposing. It can be tricky to engage with a long written document for the first time and a bit of prior domain knowledge is helpful in making a practical connection. So, I’ve been gradually working my way through the videos in the RISC-V YouTube channel. There’s a lot of really great material in there including a few gems which are directly pertinent to the HiFive1/FE310.
The following are those videos I’ve encountered which match a loose criteria of: “if I were an interested technical person, but without any prior knowledge of FE310/RISC-V, what key points would need to be introduced to make comprehending the written documentation easier?” By complete coincidence the following list also somewhat matches the bullet points describing the FE310’s features on the HiFive1 CrowdSupply page.
The Case for Open Instruction Sets
Privileged architecture summary
Compressed extension
External debug system
CLINT/interrupt handling (this was especially helpful for me as the CLINT was the first thing I looked up in the FE310 manuals):
While not implemented in the FE310 this seemed like the next logical one to watch.
Vector extension
While searching for useful content I also came across a series of Computer Science lectures from UCBerkeley’s channel. I haven’t had a chance to watch them all yet but, considering the who the lecturers are and the origins of RISC-V, I’d be very surprised if it didn’t cover something applicable: