Discuss on sifive-interrupt-cookbook

First is a miswrite, In P15 CLINT Vectored Mode:

The interrupt handler offset is calculated by mtvec.base + (mtvec.code * 4).

I think here the mtvec.code → mcause.code
Following is the thing I want to check
#1 P6 Trap Example

The software sets up the system for a context switch, and then an ECALL instruction is executed which synchronously switches control to the environmentcall-from-User mode exception handler.

I wander to know whether the sets up means prepare the ecall args(like a6, a7, …)
Cause the words in P34 Context Switch Overhead make me confused, does the sets up means save the 32+ registers ?

#2 About the CLINT Vector Mode
In RISC-V Manual Volume II:

When MODE=Vectored, all synchronous exceptions into machine mode cause the pc to be set to the address in the BASE field, whereas interrupts cause the pc to be set to the address in the BASE field plus four times the interrupt cause number.

Does the exception handler is same with the ID=0 interrupt handler(User software interrupt) ?

Thanks.

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Yes - (mtvec.code) does not exist, this should be mcause.code. Thanks for pointing this out.

For context switch details, please refer to the last chapter which describes context switch overhead in detail.

Lastly, yes, when MODE=Vectored, ID=0 location defines the exception handler. There is a description in the Privileged Spec that states the following:

When vectored interrupts are enabled, interrupt cause 0, which corresponds to user-mode software
interrupts, are vectored to the same location as synchronous exceptions. This ambiguity
does not arise in practice, since user-mode software interrupts are either disabled or delegated
to a less-privileged mode

Wow … I need to update my Spec … Thanks, by the way, is there user software interrupt now ? I try to trigger a user software interrupt in qemu virt machine, and spike, I found that I can not set USIE, USIP in mie and mip, and from the Spec, may be it not support now …
For the question 2, my confuse is truely come from the last chapter, it means context switch is save the 32 register, but for this sentence:

The software sets up the system for a context switch , and then an ECALL instruction is executed which synchronously switches control to the environmentcall-from-User mode exception handler.

It means save 32 register first and then is a ecall, but I think is ecall first … I confused about the order