Good catch, @simon either Table 58 has a typo for addresses of Claim/Complete and the Interrupt Enables for all of the Harts (0x…08 should be 0x…04, as the Table’s header alludes, “Only naturally aligned 32-bit memory accesses are required.”);
or, indeed being a 64-bit architecture, everything is laid out on an 8-Byte (not a 4-Byte) boundary where 0x…08 is correct for Claim/Complete.
Suggest making a quick stand-alone test or gdb session to probe and check.