I will offer what assistance I can, but please be aware that I myself am a beginner in the area of FPGA’s (and probably always will be) also going through a learning curve. I trust that Megan will correct me whenever I say something blatently wrong.
If you end up not being able to get the free license from your vendor, you can always purchase one from Digilent for $10 plus shipping. You can also install Vivado with a free ISE WebPACK license which remains permanent. It has some restrictions, and I am not sure if those restrictions will cause problems when trying to build the SiFive bit file or not. So, it would be better if you work with your vendor to get the promised free license. For the Z7, you should install SDSoC instead of Vivado.
After installing SDSoC, you should have access to the Xilinx Documentation Navigator, which has a plethora of documentation including tutorials for all levels of expertise, including how to create a project.
Since the Arty is not a Xilinx product, you will need to install additional resources to support it. You can download those resource files at Digilent here. That is also a good starting point to get familiar with the Arty Z7.
Vivado/SDSoC can reference the resources either on board level or chip level. That is what I was referrring to regarding tweaking the RTL. The Arty will have a different Xilinx chip identifier than the Arty Z7. That, as a minimum will have to be tweaked. With the additional resource file mentioned above installed, Vivado/SDSoC should recognize your Z7 and thereby identify all of the pin assignments. If not, you can alternatively use the Xilinx device identifier.
I cannot offer much help on building your own SiFive chisel configuration, since I am very low in the learning curve regarding chisel. The best I can do is to refer you to the SiFive Github page and Megan´s thoughfull eyes.