Upload failed, Error: Target not examined yet

Hello,follow up the guide Digilent Arty A7 with Xilinx Artix-7 Implementing SiFive FE310 RISC-V - Logic - Electronic Component and Engineering Solution Forum - TechForum │ Digi-Key. I have successfully generated my mcs file and program it on Arty-A7 T100 board, but when I use the freedom-e-sdk to upload. It failed.

$ make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty upload

scripts/upload --elf /home/fyh/RISCV/freedom-e-sdk/software/hello/debug/hello.elf --openocd /home/shared/RISCV/sifive/prebuilt/FreedomStudio-4.7.2.2019-05-0-linux.gtk.x86_64/SiFive/riscv-openocd/riscv-openocd-0.10.0-2019.05.1/bin/openocd --gdb /home/shared/RISCV/sifive/prebuilt/FreedomStudio-4.7.2.2019-05-0-linux.gtk.x86_64/SiFive/riscv64-unknown-elf-gcc/riscv64-unknown-elf-gcc-8.2.0-2019.05.3/bin/riscv64-unknown-elf-gdb --openocd-config bsp/freedom-e310-arty/openocd.cfg
Open On-Chip Debugger 0.10.0+dev (SiFive OpenOCD 0.10.0-2019.05.1)
Licensed under GNU GPL v2
For bug reports:

adapter speed: 10000 kHz
Info : auto-selecting first available session transport “jtag”. To override use ‘transport select ’.
Info : ftdi: if you experience problems at higher adapter clocks, try the command “ftdi_tdo_sample_edge falling”
Info : clock speed 10000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive, Inc.), part: 0x0000, ver: 0x2)
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet

localhost:3333: 连接超时.
“monitor” command not supported by this target.
“monitor” command not supported by this target.
You can’t do that when your target is `exec’
“monitor” command not supported by this target.
“monitor” command not supported by this target.

Any ideas ? Thank you.

And this is my result for openocd

$ openocd -f /usr/local/share/openocd/scripts/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /home/fyh/RISCV/freedom-e-sdk/bsp/freedom-e310-arty/openocd.cfg

Open On-Chip Debugger 0.10.0+dev-snapshot (2019-08-14-11:27)
Licensed under GNU GPL v2
For bug reports, read
OpenOCD: Bug Reporting
adapter speed: 10000 kHz
Warn : Interface already configured, ignoring
Info : auto-selecting first available session transport “jtag”. To override use ‘transport select ’.
Info : ftdi: if you experience problems at higher adapter clocks, try the command “ftdi_tdo_sample_edge falling”
Info : clock speed 10000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive, Inc.), part: 0x0000, ver: 0x2)
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet

段错误 (核心已转储)

I have fixed the problem, and it is about the .cfg and rules.d

Could you share with us your fix?

There are some problems in the freedom-e-sdk from github. You can replace all files by using the following files, the link is below.
https://scs.sifive.com/deliverables/sifive_e31_risc_v_core_eval_rtl/releases/v19.05p1/download

And also check your file name of 99-openocd.rules, I use the 99-opencd.rules and it didn’t work.

That is the link for the RTL code, not the SDK. Also, the link appears to be dead