Unsupported DTM Version


(Luís Fiolhais) #1

Hello everyone,

I’m trying to use the Freedom E300 FPGA Dev Kit for a project of a mine but I can’t get the JTAG to OpenOCD communication to work. OpenOCD can detect the core but fails examination, stating an incorrect debug protocol version (14). I’m using an Olimex ARM USB Tiny H to perform the communication between both, and I get the following OpenOCD log:

Open On-Chip Debugger 0.10.0+dev-00095-gf4165279 (2018-01-12-15:03)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 5 command.c:544 command_print(): debug_level: 3
Debug: 14 5 options.c:181 add_default_dirs(): bindir=/Users/lfiolhais/Projects/bar-rocket-chip/riscv-tools/bin
Debug: 15 5 options.c:182 add_default_dirs(): pkgdatadir=/Users/lfiolhais/Projects/bar-rocket-chip/riscv-tools/share/openocd
Debug: 16 5 options.c:183 add_default_dirs(): exepath=/Users/lfiolhais/Projects/bar-rocket-chip/riscv-tools/bin
Debug: 17 5 options.c:184 add_default_dirs(): bin2data=…/share/openocd
Debug: 18 5 configuration.c:42 add_script_search_dir(): adding /Users/lfiolhais/.openocd
Debug: 19 5 configuration.c:42 add_script_search_dir(): adding /Users/lfiolhais/Projects/bar-rocket-chip/riscv-tools/bin/…/share/openocd/site
Debug: 20 5 configuration.c:42 add_script_search_dir(): adding /Users/lfiolhais/Projects/bar-rocket-chip/riscv-tools/bin/…/share/openocd/scripts
Debug: 21 5 configuration.c:82 find_file(): found /Users/lfiolhais/Projects/warpbird/scripts/WarpbirdDebug.cfg
Debug: 22 6 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 10000
Debug: 23 6 command.c:143 script_debug(): command - adapter_khz ocd_adapter_khz 10000
Debug: 25 6 core.c:1745 jtag_config_khz(): handle jtag khz
Debug: 26 6 core.c:1712 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 27 6 core.c:1712 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 28 6 command.c:544 command_print(): adapter speed: 10000 kHz
Debug: 29 6 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_interface ftdi
Debug: 30 6 command.c:143 script_debug(): command - interface ocd_interface ftdi
Debug: 32 6 command.c:364 register_command_handler(): registering ‘ocd_ftdi_device_desc’…
Debug: 33 6 command.c:364 register_command_handler(): registering ‘ocd_ftdi_serial’…
Debug: 34 6 command.c:364 register_command_handler(): registering ‘ocd_ftdi_location’…
Debug: 35 6 command.c:364 register_command_handler(): registering ‘ocd_ftdi_channel’…
Debug: 36 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_layout_init’…
Debug: 37 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_layout_signal’…
Debug: 38 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_set_signal’…
Debug: 39 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_get_signal’…
Debug: 40 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_vid_pid’…
Debug: 41 9 command.c:364 register_command_handler(): registering ‘ocd_ftdi_tdo_sample_edge’…
Debug: 42 9 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_device_desc Olimex OpenOCD JTAG ARM-USB-TINY-H
Debug: 43 9 command.c:143 script_debug(): command - ftdi_device_desc ocd_ftdi_device_desc Olimex OpenOCD JTAG ARM-USB-TINY-H
Debug: 45 10 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_vid_pid 0x15ba 0x002a
Debug: 46 10 command.c:143 script_debug(): command - ftdi_vid_pid ocd_ftdi_vid_pid 0x15ba 0x002a
Debug: 48 10 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_init 0x0808 0x0a1b
Debug: 49 10 command.c:143 script_debug(): command - ftdi_layout_init ocd_ftdi_layout_init 0x0808 0x0a1b
Debug: 51 10 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_signal nSRST -oe 0x0200
Debug: 52 10 command.c:143 script_debug(): command - ftdi_layout_signal ocd_ftdi_layout_signal nSRST -oe 0x0200
Debug: 54 11 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
Debug: 55 11 command.c:143 script_debug(): command - ftdi_layout_signal ocd_ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
Debug: 57 11 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_signal LED -data 0x0800
Debug: 58 11 command.c:143 script_debug(): command - ftdi_layout_signal ocd_ftdi_layout_signal LED -data 0x0800
Debug: 60 11 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport select jtag
Debug: 61 11 command.c:143 script_debug(): command - ocd_transport ocd_transport select jtag
Debug: 62 11 command.c:364 register_command_handler(): registering ‘ocd_jtag_flush_queue_sleep’…
Debug: 63 11 command.c:364 register_command_handler(): registering ‘ocd_jtag_rclk’…
Debug: 64 11 command.c:364 register_command_handler(): registering ‘ocd_jtag_ntrst_delay’…
Debug: 65 11 command.c:364 register_command_handler(): registering ‘ocd_jtag_ntrst_assert_width’…
Debug: 66 11 command.c:364 register_command_handler(): registering ‘ocd_scan_chain’…
Debug: 67 11 command.c:364 register_command_handler(): registering ‘ocd_jtag_reset’…
Debug: 68 11 command.c:364 register_command_handler(): registering ‘ocd_runtest’…
Debug: 69 11 command.c:364 register_command_handler(): registering ‘ocd_irscan’…
Debug: 70 11 command.c:364 register_command_handler(): registering ‘ocd_verify_ircapture’…
Debug: 71 11 command.c:364 register_command_handler(): registering ‘ocd_verify_jtag’…
Debug: 72 11 command.c:364 register_command_handler(): registering ‘ocd_tms_sequence’…
Debug: 73 11 command.c:364 register_command_handler(): registering ‘ocd_wait_srst_deassert’…
Debug: 74 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 75 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 76 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 77 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 78 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 79 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 80 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 81 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 82 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 83 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 84 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 85 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 86 11 command.c:364 register_command_handler(): registering ‘ocd_jtag’…
Debug: 87 11 command.c:364 register_command_handler(): registering ‘ocd_svf’…
Debug: 88 11 command.c:364 register_command_handler(): registering ‘ocd_xsvf’…
Debug: 89 11 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap riscv cpu -irlen 5 -expected-id 0x20000913
Debug: 90 11 command.c:143 script_debug(): command - ocd_jtag ocd_jtag newtap riscv cpu -irlen 5 -expected-id 0x20000913
Debug: 91 11 tcl.c:549 jim_newtap_cmd(): Creating New Tap, Chip: riscv, Tap: cpu, Dotted: riscv.cpu, 4 params
Debug: 92 11 tcl.c:573 jim_newtap_cmd(): Processing option: -irlen
Debug: 93 11 tcl.c:573 jim_newtap_cmd(): Processing option: -expected-id
Debug: 94 11 core.c:1418 jtag_tap_init(): Created Tap: riscv.cpu @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 95 11 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target create riscv.cpu riscv -chain-position riscv.cpu
Debug: 96 11 command.c:143 script_debug(): command - ocd_target ocd_target create riscv.cpu riscv -chain-position riscv.cpu
Debug: 97 13 target.c:1922 target_free_all_working_areas_restore(): freeing all working areas
Debug: 98 13 command.c:364 register_command_handler(): registering ‘ocd_riscv’…
Debug: 99 13 command.c:364 register_command_handler(): registering ‘ocd_riscv’…
Debug: 100 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 101 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 102 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 103 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 104 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 105 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 106 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 107 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 108 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 109 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 110 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 111 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 112 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 113 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 114 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 115 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 116 13 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 117 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 118 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 119 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 120 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 121 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 122 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 123 14 command.c:364 register_command_handler(): registering ‘ocd_riscv.cpu’…
Debug: 124 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 125 14 command.c:143 script_debug(): command - init ocd_init
Debug: 127 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 128 14 command.c:143 script_debug(): command - ocd_target ocd_target init
Debug: 130 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 131 14 command.c:143 script_debug(): command - ocd_target ocd_target names
Debug: 132 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_riscv.cpu cget -event gdb-flash-erase-start
Debug: 133 14 command.c:143 script_debug(): command - ocd_riscv.cpu ocd_riscv.cpu cget -event gdb-flash-erase-start
Debug: 134 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_riscv.cpu configure -event gdb-flash-erase-start reset init
Debug: 135 14 command.c:143 script_debug(): command - ocd_riscv.cpu ocd_riscv.cpu configure -event gdb-flash-erase-start reset init
Debug: 136 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_riscv.cpu cget -event gdb-flash-write-end
Debug: 137 14 command.c:143 script_debug(): command - ocd_riscv.cpu ocd_riscv.cpu cget -event gdb-flash-write-end
Debug: 138 14 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_riscv.cpu configure -event gdb-flash-write-end reset halt
Debug: 139 14 command.c:143 script_debug(): command - ocd_riscv.cpu ocd_riscv.cpu configure -event gdb-flash-write-end reset halt
Debug: 140 14 target.c:1331 handle_target_init_command(): Initializing targets…
Debug: 141 14 riscv.c:251 riscv_init_target(): riscv_init_target()
Debug: 142 15 command.c:364 register_command_handler(): registering ‘ocd_target_request’…
Debug: 143 15 command.c:364 register_command_handler(): registering ‘ocd_trace’…
Debug: 144 15 command.c:364 register_command_handler(): registering ‘ocd_trace’…
Debug: 145 15 command.c:364 register_command_handler(): registering ‘ocd_fast_load_image’…
Debug: 146 15 command.c:364 register_command_handler(): registering ‘ocd_fast_load’…
Debug: 147 15 command.c:364 register_command_handler(): registering ‘ocd_profile’…
Debug: 148 15 command.c:364 register_command_handler(): registering ‘ocd_virt2phys’…
Debug: 149 15 command.c:364 register_command_handler(): registering ‘ocd_reg’…
Debug: 150 15 command.c:364 register_command_handler(): registering ‘ocd_poll’…
Debug: 151 15 command.c:364 register_command_handler(): registering ‘ocd_wait_halt’…
Debug: 152 15 command.c:364 register_command_handler(): registering ‘ocd_halt’…
Debug: 153 15 command.c:364 register_command_handler(): registering ‘ocd_resume’…
Debug: 154 15 command.c:364 register_command_handler(): registering ‘ocd_reset’…
Debug: 155 15 command.c:364 register_command_handler(): registering ‘ocd_soft_reset_halt’…
Debug: 156 15 command.c:364 register_command_handler(): registering ‘ocd_step’…
Debug: 157 16 command.c:364 register_command_handler(): registering ‘ocd_mdd’…
Debug: 158 16 command.c:364 register_command_handler(): registering ‘ocd_mdw’…
Debug: 159 16 command.c:364 register_command_handler(): registering ‘ocd_mdh’…
Debug: 160 16 command.c:364 register_command_handler(): registering ‘ocd_mdb’…
Debug: 161 16 command.c:364 register_command_handler(): registering ‘ocd_mwd’…
Debug: 162 16 command.c:364 register_command_handler(): registering ‘ocd_mww’…
Debug: 163 16 command.c:364 register_command_handler(): registering ‘ocd_mwh’…
Debug: 164 16 command.c:364 register_command_handler(): registering ‘ocd_mwb’…
Debug: 165 16 command.c:364 register_command_handler(): registering ‘ocd_bp’…
Debug: 166 16 command.c:364 register_command_handler(): registering ‘ocd_rbp’…
Debug: 167 16 command.c:364 register_command_handler(): registering ‘ocd_wp’…
Debug: 168 16 command.c:364 register_command_handler(): registering ‘ocd_rwp’…
Debug: 169 16 command.c:364 register_command_handler(): registering ‘ocd_load_image’…
Debug: 170 16 command.c:364 register_command_handler(): registering ‘ocd_dump_image’…
Debug: 171 16 command.c:364 register_command_handler(): registering ‘ocd_verify_image_checksum’…
Debug: 172 16 command.c:364 register_command_handler(): registering ‘ocd_verify_image’…
Debug: 173 16 command.c:364 register_command_handler(): registering ‘ocd_test_image’…
Debug: 174 16 command.c:364 register_command_handler(): registering ‘ocd_reset_nag’…
Debug: 175 16 command.c:364 register_command_handler(): registering ‘ocd_ps’…
Debug: 176 16 command.c:364 register_command_handler(): registering ‘ocd_test_mem_access’…
Debug: 177 16 ftdi.c:657 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
Debug: 178 27 mpsse.c:422 mpsse_purge(): -
Debug: 179 28 mpsse.c:703 mpsse_loopback_config(): off
Debug: 180 28 mpsse.c:748 mpsse_set_frequency(): target 10000000 Hz
Debug: 181 28 mpsse.c:740 mpsse_rtck_config(): off
Debug: 182 28 mpsse.c:729 mpsse_divide_by_5_config(): off
Debug: 183 28 mpsse.c:709 mpsse_set_divisor(): 2
Debug: 184 28 mpsse.c:772 mpsse_set_frequency(): actually 10000000 Hz
Debug: 185 28 core.c:1712 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 186 28 core.c:1715 adapter_khz_to_speed(): have interface set up
Debug: 187 28 mpsse.c:748 mpsse_set_frequency(): target 10000000 Hz
Debug: 188 28 mpsse.c:740 mpsse_rtck_config(): off
Debug: 189 28 mpsse.c:729 mpsse_divide_by_5_config(): off
Debug: 190 28 mpsse.c:709 mpsse_set_divisor(): 2
Debug: 191 28 mpsse.c:772 mpsse_set_frequency(): actually 10000000 Hz
Info : 192 28 ftdi.c:291 ftdi_speed(): ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Debug: 193 28 core.c:1712 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 194 28 core.c:1715 adapter_khz_to_speed(): have interface set up
Info : 195 28 core.c:1500 adapter_init(): clock speed 10000 kHz
Debug: 196 28 openocd.c:140 handle_init_command(): Debug Adapter init complete
Debug: 197 28 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 198 29 command.c:143 script_debug(): command - ocd_transport ocd_transport init
Debug: 200 29 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 201 29 core.c:729 jtag_add_reset(): SRST line released
Debug: 202 29 core.c:753 jtag_add_reset(): TRST line released
Debug: 203 29 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 204 29 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init
Debug: 205 29 command.c:143 script_debug(): command - ocd_jtag ocd_jtag arp_init
Debug: 206 29 core.c:1513 jtag_init_inner(): Init JTAG chain
Debug: 207 29 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 208 29 core.c:1173 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 209 29 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 210 29 core.c:1072 jtag_examine_chain_display(): JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive, Inc.), part: 0x0000, ver: 0x2)
Debug: 211 29 core.c:1304 jtag_validate_ircapture(): IR capture validation scan
Debug: 212 29 core.c:1362 jtag_validate_ircapture(): riscv.cpu: IR capture 0x01
Debug: 213 30 openocd.c:153 handle_init_command(): Examining targets…
Debug: 214 30 target.c:1524 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 215 30 riscv.c:653 riscv_examine(): riscv_examine()
Debug: 216 30 riscv.c:228 dtmcontrol_scan(): DTMCONTROL: 0x0 -> 0xfffffffe
Debug: 217 30 riscv.c:663 riscv_examine(): dtmcontrol=0xfffffffe
Debug: 218 30 riscv.c:665 riscv_examine(): version=0xe
Error: 219 30 riscv.c:243 get_target_type(): Unsupported DTM version: 14
Debug: 220 30 openocd.c:155 handle_init_command(): target examination failed
Debug: 221 30 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 222 30 command.c:143 script_debug(): command - ocd_flash ocd_flash init
Debug: 224 30 tcl.c:1166 handle_flash_init_command(): Initializing flash devices…
Debug: 225 31 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 226 31 command.c:143 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 228 31 mflash.c:1377 handle_mflash_init_command(): Initializing mflash devices…
Debug: 229 31 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 230 31 command.c:143 script_debug(): command - ocd_nand ocd_nand init
Debug: 232 31 tcl.c:497 handle_nand_init_command(): Initializing NAND devices…
Debug: 233 31 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 234 31 command.c:143 script_debug(): command - ocd_pld ocd_pld init
Debug: 236 31 pld.c:205 handle_pld_init_command(): Initializing PLDs…
Info : 237 32 server.c:307 add_service(): Listening on port 3333 for gdb connections
Debug: 238 32 command.c:143 script_debug(): command - ocd_command ocd_command type ocd_halt
Debug: 239 32 command.c:143 script_debug(): command - halt ocd_halt
Debug: 241 32 target.c:2936 handle_halt_command(): -
Error: 242 32 target.c:562 target_halt(): Target not examined yet
Debug: 243 32 command.c:626 run_command(): Command failed with error code -4
User : 244 32 command.c:687 command_run_line():

Does anyone know what’s wrong?

Another question that I have is why the debug module TRSTn isn’t connected anywhere but the docs state that it should be connected. The jtag module is created with
val jtag = new JTAGPins(() => PinGen(), false),
at Platform.scala in E300ArtyDevKitPlatformIO, which, according to JTAGPins.scala (sifive-blocks), doesn’t use TRSTn.
Is this correct? If so, why?

Cheers!


(Megan A. Wachs) #2

I’d double check your connections to ensure everything is hooked up right, though I do see that you are able to successfully read IDCODE. Are you sure you are using the correct versions of all submodules?

Yes, TRSTn is not actually used in the design.

EDITED: Correction on what the most likely problem is, since I do see you are able to read out IDCODE.


(Luís Fiolhais) #3

Hi @mwachs5,

Thanks for replying. I’ve done as instructed and checked all connection to the FPGA again, they all look correct (I can post a picture if needed). I’ve also checked the submodules versions and they are at the following commits:

  • Rocket Chip 7e75d63,
  • fpga-shells 8b0d7ec,
  • sifive-blocks 9052a07.

I’ll add a little bit of info about my current setup as it is different from the starter guide. I’m implementing the Freedom E300 SoC in a Zedboard board, thus I’ve had to perform a couple of changes to the shell. I added constraints for the Zedboard board, added a shell in fpga-shells, and edited Platform.scala, FPGAChip.scala, System.scala and Config.scala. In System.scala, I removed the QSPI Flash and the UART modules because they aren’t accessible within the programmable logic, and I also removed the PWM (updated Platform.scala and FPGAChip.scala accordingly). The only relevant change in the SoC configuration is the usage of a small core instead of a tiny core.

I’m implementing the SoC using Vivado 2016.2. I had to add the MMCM and proc_sys_rst IPs manually (I can provide screenshots of their configurations if needed). To check if the clock and reset are working properly I changed the bootrom contents in xip.S to blink three LEDs, they blink correctly. I also changed the ck_rst signal from active low to active high (the buttons in the Zedboard are active high when pressed), the remaining resets were untouched. The OpenOCD configuration is the same as the one in here, except with lines 20 and 22 commented out (I still have to figure out how to connect to external memory), and a different id in line 16.

If there is anything missing, I’d be happy to provide more information about my setup. Thanks for the help!

EDITED: Clarify which modules I’m using in my system and specify changes to the repo. Emphasize I’m using the Zedboard board.


(Megan A. Wachs) #4

Do you have access to a newer version of Vivado? We’ve had trouble with some synthesis bugs in versions earlier than 2016.4 which affected the JTAG interface.


(Luís Fiolhais) #5

OK! I will try it and report back. But now I’m curious because you don’t have that restriction in the Freedom U500 SoC. Are you using a different JTAG interface?


(Megan A. Wachs) #6

No, turns out it the Freedom U500 has the same Vivado issue and we’ll be updating the Vivado version shortly for that one too.


(Luís Fiolhais) #7

Generated the bitstream using Vivado 2017.1 but I still have the same error.

FWIW the only synthesis warning I get, which references the JTAG interface, is in JtagBypassChain which has an unconnected reset and io_chainIn_update. I don’t see those wires connected in JtagTap.scala so I’m assuming this is expected.


(Luís Fiolhais) #8

Any other ideas?


(Megan A. Wachs) #9

Sorry, it’s a bit tricky to diagnose since you are using hardware and a flow we don’t support. It’s unusual that you have the ability to read the IDCODE but not the other JTAG registers, I have never seen that failure mode.

Have you tried setting up Chipscope on your flow to get an inside look at what’s going on? You could try logging your JTAG state, IR/DR registers, etc.

You may also want to try turning down your JTAG frequency.


(Luís Fiolhais) #10

That’s fine, I appreciate the help thus far :slight_smile: . I’ll try to debug it.


#11

@lfiolhais, have you found out the bug? I have a similar problem, the TAP can actually be recognized by the debugger, but after that it is stuck at an infinite scan loop…


(Luís Fiolhais) #12

Hey there, I haven’t had the time to debug the problem. Sorry.


#13

It is ok @lfiolhais, I will post up if I have a solution to it. Cheers.


(Rajesh) #14

" Unsupported DTM version: 14" means openocd is unable to get proper data from dtmcs(0x10) or openocd is sending a command to select other register instead of dtmcs. It may be due to following reasons.

  1. mismatch encoding of dtmcs register in openocd files and design. So check encoding for JTAG DTM register as per requirement.

  2. Check ir_length. In my case, riscv spike.cfg using irlen as 5 but in xilinx (Vivado) it is 6. so due to the mismatch dtmcs is not selected properly.

  3. Unsupported JTAG adapter frequency.