Unmatched u-boot source code

Unmatched u-boot source code

Dees anyone have a link to the unmatched u-boot loader source code. I am looking for any code which might initialize the S7 core and perhaps put it into a loop.

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The u-boot Github Repository

arch/riscv/cpu · master · U-Boot / U-Boot · GitLab (denx.de)


The S7 core is disabled ( device tree ) in u-boot. I believe S7 core enters a loop

I have looked through the u-boot source, however I cannot clearly see where the disabled core enters this loop.

Have you looked at start.S, where the cpus are started.
at the bottom look for “secondary_hart_loop”
It is also worth checking that the config has 5 harts, I have seen only 4 when using unmatched configurations with qemu.

I’m not a booting expert, but my understanding is that on power-on reset all harts start executing at the same address. There is a lottery (see hart_lottery) which makes one hart the master and the others are sent to a wait-for-interrupt loop (see secondary_hart_loop). The master runs u-boot and the linux kernel, and then inside the linux kernel we send interrupts to the other u7 harts to wake them up and start doing useful work. But the linux kernel never sends an interrupt to the s7 hart so it remains forever in the wait-for-interrupt loop.

  • All harts execute together, all the way to u-boot and to the point of starting the kernel
  • At some point during the kernel load, all harts are within the same
  • Four harts (not the S7 core) exit the loop during the kernel boot.

Using the below debug method, this can be confirmed.


It seems the loop is found in the OpenSBI code, not the bootloader.