Unable to reprogram HiFive1 board


#1

Hi,

I have a HiFive1 board and I have been using it for two months now. I am using openocd to program the board, and more specifically I am using a branch at fa8d7adf33986302100313a791418423a7d4c758 commit.

For some reason now, I am unable to reprogram the board. I am using the following commands:

make OPENOCD_DEBUG_LEVEL=3 PROGRAM=hello TARGET=sifive-hifive1 CONFIGURATION=debug software
make OPENOCD_DEBUG_LEVEL=3 PROGRAM=hello TARGET=sifive-hifive1 CONFIGURATION=debug upload

The compilation logs show that I cannot get some device info, and I get a timeout in the end as shown below:

...
...
Debug: 382 70 riscv.c:2819 riscv_init_registers(): create register cache for 4162 registers
Debug: 383 72 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x0 -> 0x1450
Debug: 384 72 riscv-011.c:1467 examine(): dtmcontrol=0x1450
Debug: 385 72 riscv-011.c:1468 examine():   addrbits=5
Debug: 386 72 riscv-011.c:1469 examine():   version=0
Debug: 387 72 riscv-011.c:1470 examine():   idle=5
Debug: 388 74 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> ? ih:bfe7ffff @00
Debug: 389 78 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 390 78 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=1, interrupt_high_delay=0
Debug: 391 82 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 392 84 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 393 84 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=2, interrupt_high_delay=0
Debug: 394 88 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 395 93 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 396 93 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=3, interrupt_high_delay=0
Debug: 397 96 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 398 100 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 399 100 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=4, interrupt_high_delay=0
Debug: 400 102 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 401 104 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 402 104 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=5, interrupt_high_delay=0
Debug: 403 105 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 404 107 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
....
....
....
localhost:3333: Connection timed out.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
"monitor" command not supported by this target.
"monitor" command not supported by this target.
Debug: 851 12438 server.c:609 sig_handler(): Terminating on Signal 15
Error: 852 12438 mpsse.c:928 mpsse_flush(): libusb_handle_events() failed with LIBUSB_ERROR_INTERRUPTED
Debug: 853 12438 mpsse.c:429 mpsse_purge(): -

I have also an identical device that I can program with the same environment as shown below:

...
...
Debug: 382 75 riscv.c:2819 riscv_init_registers(): create register cache for 4162 registers
Debug: 383 84 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x0 -> 0x1450
Debug: 384 84 riscv-011.c:1467 examine(): dtmcontrol=0x1450
Debug: 385 84 riscv-011.c:1468 examine():   addrbits=5
Debug: 386 84 riscv-011.c:1469 examine():   version=0
Debug: 387 84 riscv-011.c:1470 examine():   idle=5
Debug: 388 89 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> + ..:41002403 @00
Debug: 389 91 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> b ..:00000000 @00
Debug: 390 91 riscv-011.c:341 increase_dbus_busy_delay(): dtmcontrol_idle=5, dbus_busy_delay=1, interrupt_high_delay=0
Debug: 391 93 riscv-011.c:303 dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550
Debug: 392 95 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> + ..:00001821 @11
Debug: 393 95 riscv-011.c:1494 examine(): dminfo: 0x00001821
Debug: 394 95 riscv-011.c:1495 examine():   abussize=0x0
Debug: 395 95 riscv-011.c:1496 examine():   serialcount=0x0
Debug: 396 95 riscv-011.c:1497 examine():   access128=0
Debug: 397 95 riscv-011.c:1498 examine():   access64=0
Debug: 398 95 riscv-011.c:1499 examine():   access32=0
Debug: 399 95 riscv-011.c:1500 examine():   access16=0
Debug: 400 95 riscv-011.c:1501 examine():   access8=0
Debug: 401 95 riscv-011.c:1502 examine():   dramsize=0x6
Debug: 402 95 riscv-011.c:1503 examine():   authenticated=0x1
Debug: 403 95 riscv-011.c:1504 examine():   authbusy=0x0
Debug: 404 95 riscv-011.c:1505 examine():   authtype=0x0
Debug: 405 95 riscv-011.c:1506 examine():   version=0x1
Debug: 406 95 riscv-011.c:754 cache_set32(): cache[0x0] = 0xfff04493: DASM(0xfff04493)
Debug: 407 95 riscv-011.c:754 cache_set32(): cache[0x1] = 0x01f4d493: DASM(0x1f4d493)
Debug: 408 95 riscv-011.c:754 cache_set32(): cache[0x2] = 0x40902023: DASM(0x40902023)
Debug: 409 95 riscv-011.c:754 cache_set32(): cache[0x3] = 0x01f4d493: DASM(0x1f4d493)
Debug: 410 95 riscv-011.c:754 cache_set32(): cache[0x4] = 0x40902223: DASM(0x40902223)
Debug: 411 95 riscv-011.c:754 cache_set32(): cache[0x5] = 0x3f00006f: DASM(0x3f00006f)
Debug: 412 95 riscv-011.c:754 cache_set32(): cache[0x6] = 0x060c1218: DASM(0x60c1218)
Debug: 413 95 riscv-011.c:843 cache_write(): enter
...
...
...
Start address 0x20400000, load size 22774
Transfer rate: 16 KB/sec, 3795 bytes/write.
shutdown command invoked
Debug: 20705 2104 gdb_server.c:397 gdb_put_packet_inner(): sending packet '$OK#9a'
Debug: 20706 2104 gdb_server.c:1046 gdb_connection_closed(): GDB Close, Target: riscv.cpu.0, state: running, gdb_actual_connections=0
Debug: 20707 2104 target.c:1609 target_call_event_callbacks(): target event 6 (gdb-end) for core 0
Debug: 20708 2104 target.c:1609 target_call_event_callbacks(): target event 20 (gdb-detach) for core 0
Debug: 20709 2104 riscv.c:453 riscv_deinit_target(): riscv_deinit_target()
Debug: 20710 2104 riscv-011.c:1407 deinit_target(): riscv_deinit_target()
A debugging session is active.

        Inferior 1 [Remote target] will be detached.

Quit anyway? (y or n) [answered Y; input not from terminal]
Debug: 20711 2104 target.c:1959 target_free_all_working_areas_restore(): freeing all working areas
Debug: 20712 2104 target.c:1724 print_wa_layout():    0x80000000-0x8000270f (10000 bytes)
Remote connection closed

My question is the following:
What is the dtmcontrol_scan(): DTMCONTROL: 0x10000 -> 0x1550 command trying to read? Maybe the specific output from the functioning board will help:

Debug: 392 95 riscv-011.c:410 scan(): 41b r ..:00000000 @11 -> + ..:00001821 @11
Debug: 393 95 riscv-011.c:1494 examine(): dminfo: 0x00001821
Debug: 394 95 riscv-011.c:1495 examine():   abussize=0x0
Debug: 395 95 riscv-011.c:1496 examine():   serialcount=0x0
Debug: 396 95 riscv-011.c:1497 examine():   access128=0
Debug: 397 95 riscv-011.c:1498 examine():   access64=0
Debug: 398 95 riscv-011.c:1499 examine():   access32=0
Debug: 399 95 riscv-011.c:1500 examine():   access16=0
Debug: 400 95 riscv-011.c:1501 examine():   access8=0
Debug: 401 95 riscv-011.c:1502 examine():   dramsize=0x6
Debug: 402 95 riscv-011.c:1503 examine():   authenticated=0x1
Debug: 403 95 riscv-011.c:1504 examine():   authbusy=0x0
Debug: 404 95 riscv-011.c:1505 examine():   authtype=0x0
Debug: 405 95 riscv-011.c:1506 examine():   version=0x1

I am suspecting that have “fried/broke” something on the board but I am trying to understand what.

Thanks!

Cheers,
Stefanos