U500 L2 Cache in Linux

Hi All,

Is L2 cache getting configured in RISCV linux port?

Badal Nilawar

I’m not sure what you’re asking. The U500 image for the VC707 does not currently include an L2-cache, but the actual chip will. However, the cache subsystem is completely invisible and irrelevant to Linux; a multicore system is cache coherent and Linux does not need to take any action to benefit from either coherency or an L2 cache.