Hi, I’m designing a RISC-V core and planning to test it on a FPGA board with a simple c code. I want to compare it with the SPIKE simulator. C code is working fine with spike pk but when I try bare metal simulation, I’m getting the error given in the figure below. 
The program I’m trying to simulate is something like this:
int main() {
asm(“li a7, 8”);
return 0;
}
Is this the problem caused by my c program or do I have to make some changes on the configuration of spike or gcc. Thanks in advance. 
The compiler by default will link startfiles (e.g. crt0.o) that assume that you are running on a user mode simulator. They won’t work on a bare metal simulator. To run bare metal, you need startfiles intended to work with bare metal. You can work around some of these problems by using -nostartfiles -nostdlib, and writing your own startfiles, but once you try to do anything interesting like access memory that is going to fail unless you first set up the machine to allow memory accesses to work.
I would suggest looking at github.com/riscv/riscv-tests which has tests that work bare metal on spike, and have startfiles that initialize enough of the machine to run interesting code.
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I have tried some of the examples in the riscv-tests repository and they worked. Now I’m writing my own start files. Thanks again. 