What means are currently available to generate and analyze the core dumps of bare metal RISC-V firmware?
(Sorry, as a newbie I can only use 2 web-links in my first post(s))
I work with my-employer-specific fork of minimalistic RISC-V CPU PicoRV32 (github . com/cliffordwolf/picorv32
). The Verilog-based bit image of the CPU is flashed to the FPGA connected over JTAG+USB to the personal computer, where I use (again, my-employer-specific fork of) OpenOCD. I use the RISC-V GNU tool-chain (riscv32-unknown-elf-gcc
, riscv32-unknown-elf-gdb
) to compile and debug the bare metal RISC-V firmware. Works good.
I need to be able to generate and analyze the core dumps of the bare metal RISC-V firmware (see man 5 core
or man7 . org/linux/man-pages/man5/core.5.html
). E.g. in riscv32-unknown-elf-gdb
command prompt I want to enter gcore
(gdb) gcore
and to get the core dump file. Then to analyze that core dump with riscv32-unknown-elf-gdb
(search for “core” here - sourceware . org/gdb/current/onlinedocs/gdb/Files.html#index-core-dump-file
).
When I do (gdb) gcore
, the riscv32-unknown-elf-gdb
tells me Can't create a corefile
, and most importantly it does not even try, i.e. it does not send any requests to the gdb server (in OpenOCD). This makes me think that riscv32-unknown-elf-gdb
cannot generate and cannot analyze the (bare metal) core files. Is such my suspicion correct?
If the riscv32-unknown-elf-gdb
still can analyze the (bare metal) core dump files then what means are there available to generate the core files. Are there any C/C++ libraries? Or will I have to implement the generation by myself (e.g. searching for “core” in man 5 elf
- man7 . org/linux/man-pages/man5/elf.5.html
)?
I also plan to generate the core dump files when the RISC-V firmware does something wrong, e.g. accesses the NULL pointer. My code in OpenOCD will notice that and generate the core dump file.