[Solved] "mtime" register is increasing when halting in GDB


When I’m debugging the remote target on the HiFive1 Rev B, my GDB tells me the mtime (address at 0x200bff8) value is still increasing even if the execution is halted. If I continue to the next break point, the trap is always triggered because mtime becomes greater than the mtimecmp while halting. I’m wondering is this how the architecture is designed or an issue of GDB or GDB server?

My configurations of GDB server

JLinkGDBServer -device FE310 -if JTAG -speed 4000 -port 333 -nogui


riscv-openocd -f board/sifive-hifive1-revb.cfg -c "halt" -c "reset init" -c "reset run"


Hi Kaizsv,
When you put a breakpoint you halt the core not the peripheral, so mtime still continue to increase (like any other peripheral, like if you change a gpio input and read the register, the value will change. you will have the same if you enable the interrupt on this GPIO input, an interrupt is generated when you are stopped then you jump into the interrupt handler when you restart).


Yes, you reminds me I have read it before.
Thanks for your fast reply.

It’s not a GDB issue.

Unlike Cortex-M, there is no proper SysTick in the RISC-V specs; the mtimer is in a separate power domain, possibly powered by a battery, and is expected to run continuously from a low frequency oscillator, thus making it more appropriate for an RTC than a system timer.

Not to mention that when running from an 32,768 Hz input, you cannot get an accurate 1,000 Hz scheduler clock, and measuring durations with it provides a very poor precision.

Weird architecture design.

Yes, this confused me a whole afternoon because I used to debug on Cortex-M. :slight_smile:

I got it. Thanks for your reply.

You’re welcome… Wait until you get to the interrupt controller. Another beauty