I remember that, in the past, custom SoCs could exclude PMP even when U mode and S mode were configured. Is this correct? Currently, when U mode is enabled in CPU mode, equipping PMP is mandatory. If a customer requests it, is it possible to purchase a custum SoC that includes U mode and S mode but excludes PMP? Additionally, I would appreciate it if you could provide information on such legacy CPUs. Thank you in advance for your response.
Hi - I’m curious, why would you want to exclude PMP if you have U & S mode in the design?
I am wondering because the RISC-V privilege specification states that PMP is optional.
I am wondering because the RISC-V privilege specification states that PMP is optional.
I think that means that PMP can be implemented or not. But if it’s implemented then it’s active. If you want permissive access to memory in User mode then you probably need to configure PMP to allow all r/w/x access to all of the memory map.
I think that this is allowed/possible but I don’t know if any existing RISC-V implementation supports M/U modes but not PMP.
What exactly do you mean by this? What specific RISC-V implementations? The HiFive1 FE310-G002 is documented here in case that’s what you’re referring to?