As we all know, the default perf list are just a symbolic links to real PMU events.
I have ended up with following table of perf list to FU740 Events relations.
Perf name | Linux enum | Perf ID | FU740 Name | FU740 Id |
---|---|---|---|---|
branch-instructions OR branches | PERF_COUNT_HW_BRANCH_INSTRUCTIONS | 0x04 | Conditional branch retired | 0x4000 |
branch-misses | PERF_COUNT_HW_BRANCH_MISSES | 0x05 | Branch direction misprediction Branch/jump target misprediction | 0x2001 0x4001 |
bus-cycles | PERF_COUNT_HW_BUS_CYCLES | 0x06 | N/A | |
cache-misses | PERF_COUNT_HW_CACHE_MISSES | 0x03 | Instruction cache miss Data cache miss or memory-mapped I/O access | 0x0102 0x0202 |
cache-references | PERF_COUNT_HW_CACHE_REFERENCES | 0x02 | Instruction cache/ITIM busy Data cache/DTIM busy | 0x0801 0x1001 |
cpu-cycles OR cycles | PERF_COUNT_HW_CPU_CYCLES | 0x00 | mcycles | 0x01 |
instructions | PERF_COUNT_HW_INSTRUCTIONS | 0x01 | minstret | 0x02 |
ref-cycles | PERF_COUNT_HW_REF_CPU_CYCLES | 0x09 | N/A | |
stalled-cycles-backend OR idle-cycles-backend | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND | 0x07 | ||
stalled-cycles-frontend OR idle-cycles-frontend | PERF_COUNT_HW_STALLED_CYCLES_BACKEND | 0x08 | ||
Please look at it if it seems correct, also i have a question about stalled cycles frontend/backend, in FU740 manual we have the following list:
Address-generation interlock
Long-latency interlock
CSR read interlock
Integer multiplication interlock
Floating-point interlock
What of above, if any, should go to stalled cycles? These doesn’t look like stalled cycles at all. Should stalled-cycles also be a N/A ?