Is mtime a csr or memory mapped in fe310?


Risc-v privilege spec says mtime and mtimecmp are csr registers. But the FE310 manual provides an memory address for mtime (0x02004000 in section 9.1 ). If I am right, CSRs are hardware registers (not memory mapped). Can someone clarify this?

I just read the description below in privilege spec, it says mtime and mtimecmp are exposed as memory mapped machine mode RW registers. Are these the only exception in CSRs(not hardware registers)?

They are not CSRs, they are memory-mapped registers like in any other memory-mapped device.