Implementation of hypervisor extensions (H)

Hi folks,

AFAIK the H extensions are not yet final but are not expected to change much, so I was wondering if any of you knows of an open RISC-V core implementation that includes a WIP of the H extensions and is open to tinker with.

(apologies if this is not the right forum for this question, I will happily take pointers to others)


There’s a branch for Rocket Add hypervisor extension by aswaterman · Pull Request #2841 · chipsalliance/rocket-chip · GitHub

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Hi Lluis, this is probably a better question for /r/riscv on Reddit or a RISC-V International mailing list such as ISA-DEV

Great, thanks very much Jessica and Bruce!


thanks for the awesome information.