Would like to know if any latest update on above. Like any ways to modify the MSEL pin states or any updated documentation?
(I am now referring to April 11, 2019 documentation corresponding to FE310-g002 manual.)
As per section 5 in above documentation, since MSEL pins states are NOT modifiable,
Can someone explain how & when the boot process jumps into FLASH or RAM ?
I see after power reset, the execution jumps into flash/ram, but could n’t understand how?
The MSEL pins are fixed at 0x3 (they are not bonded out), and it looks like we still need to remove that table to avoid any further confusion. Thanks for pointing this out - we will get this fixed. I’ve dissected the boot flow a little bit more to demonstrate how it works:
Reset Vector ROM
0x1000: Holds MSEL "pins", value of 0x3 (pins are NOT bonded out)
0x1004: BOOT ENTRY POINT IS HERE:
auipc t0, 0 // load t0 with PC (t0 = 0x1004)
lw t1, -4(t0) // load t1 with MSEL (t0 = 0x3, fixed)
slli t1, t1, 0x3 // shift t1 left by 3. (t1 = 0x18)
add t0, t0, t1 // t0 = t0 + t1 (t0 = 0x101C)
lw t0, 252(t0) // load t0 with value at 0x101C (t0 = 0x10000)
jr t0 // jump to memory mapped Mask ROM ......
memory mapped Mask ROM (jumps to memory mapped OTP)
00010000: 0x732540f1 csrr a0,mhartid // a0 = 0
00010004: 0x97050000 auipc a1,0x0 // a1 = 0x10004
00010008: 0x93854505 addi a1,a1,84 # 0x10058 // a1 = 0x10058
0001000c: 0xb7020200 lui t0,0x20 // t0 = 0x20000
00010010: 0x67800200 jr t0 # 0x20000 // jump to 0x20000, memory mapped OTP
memory mapped OTP
Run low level init and jump to QSPI location 0x20010000
Thanks, that explains how execution jumps into rom (0x20010000) and start executing from.
But, I am not clear what “not bonded out” mean.
I am waiting for my FE310-G002 chips to arrive, would I be able to modify the MSEL pins state (pull up/down) in my PCB? or are these MSEL pins not even out of FE310-G0002 chip?