How did you generate freedom-e310-arty-1-0-2.mcs file?

Hi, I downloaded freedom-e310-arty-1-0-2.mcs from SiFive web. After the fpga programming is completed, press ‘PROG’ button to reload and get the following output.

core freq at 65000000 Hz

            SIFIVE, INC.

     5555555555555555555555555
    5555                   5555
   5555                     5555
  5555                       5555
 5555       5555555555555555555555
5555       555555555555555555555555

5555 5555
5555 5555
5555 5555
5555555555555555555555555555 55555
55555 555555555 55555
55555 55555 55555
55555 5 55555
55555 55555
55555 55555
55555 55555
55555 55555
55555 55555
555555555
55555
5

SiFive E-Series Software Development Kit ‘demo_gpio’ program.
Every 1.5 second, the Timer Interrupt will invert the LEDs.
(Arty Dev Kit Only): Press Buttons 0, 1, 2 to Set the LEDs.

My question is: How did you merge an elf and bit file into an mcs ?


This file is the one that does that, the tcl command write_cfgmem merges the bitstream and the program elf

Thanks a lot.

Could you please share the download link to “freedom-e310-arty-1-0-2.mcs” ?
Thanks in advance.

Regards,
Vinoth

Try the following link:
https://scs.sifive.com/deliverables/sifive_e31_risc_v_core_eval_rtl/releases/v19.05p1/

Thanks for the inputs.
I was in a impression that we would get the complete RTL of FE310-G002 microcontroller which is in HiFive boards. Is that not the case ? Thanks.

Regards
Vinoth.