The Freedom E300 Dev Kit is now available!
Go to https://dev.sifive.com/dev-boards/ to get yours!
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What’s the core frequency of this system? Or how do you find that out?
Good question! I assume you are asking what the core frequency is for the E300 and U500 bitfiles we provide. The core frequency for our reference designs on the board is set to 65MHz. The RTC (used for mtime and mtimecmp) is at 650 kHz.
Actually this is specific to the microsemi sf2+ platform (with E300 reference core) that was handed out in the RISC_V 4th workshop. Thanks.
The Coreplex on the Microsemi board is clocked at 100MHz.
Thanks. Do you know where in the libero project file this is specified? Is it possible to change the clk frequency?
It is a little messy in the Libero design provided at the workshop. You need to change the frequency of the “Clock Conditioning Circuit” (CCC) in the SmartFusion2_reference_system_sb block and make sure that the micro controller subsystem (MSS) clock configuration matches that frequency.
Use the Design Hierarchy view to open SmartFusion2_reference_system_sb block. You will see a CCC_0 IP block generating the system’s clocks. Right-click and select configure. Change the frequency of GL0. That’s the FPGA fabric frequency modified, now you need to make sure the MSS matches this frequency.
Open the SmartFusion2_reference_system_sb_MSS block from the Design Hierarchy. Open the MSS_CCC block and set the M3_CLK to the frequency you selected in the CCC_0 configuration for GL0.
Hi, in my Libero project, both these values are set to 50mhz, so I guess the freq is set at 50mhz.
Do you know what the best Coremark/Mhz score is for this core? Does the riscv toolchain support printf and clock() to be able to run Coremark on this system?
Thanks
Hi,
I have not run CoreMark. I do not believe clock() is supported. You can run Dhrystone. Dhrystone is above 1 DMIPS/MHz
Regards,
Cyril.
If clock() is not supported, how do you get the CPU time? Also, what header files and platform initialization calls do I need to include to do printf to the UART? Thanks.
You can use the mcycle CSR to implement a low-level clock() function.