Documentation for CLINT?

I’m trying to write a QEMU board definition for the HiFive1, and I’ve run into what seems to be an inconsistency between the documentation and the BSP.

In the BSP, bsp/env/freedom-e300-hifive1/init.c:11 defines a function mtime_lo() that reads from CLINT_BASE_ADDR + CLINT_MTIME. The layout described in clint.h seems to line up with the MSIP Registers defined in SiFive-E3-Coreplex-v1.1, section 6.2. However, those registers are located at 0x4400_XXXX in the E3 Coreplex manual, whereas platform.h defines CLINT_BASE_ADDR to be at 0x0200_0000.

Am I missing some documentation for this “CLINT” device? Are the manual and the BSP referring to the same device here?

Awesome that you’re working on supporting this in QEMU! Thanks for pointing out the inconsistency. We realized that we didn’t post the updated version of the E3 Coreplex document to go along with the other documents, we’ll post the new version shortly.

On FE310 chip/HiFive1 board, the CLInt deals with the local interrupt sources (timer & software). The CLInt base address is indeed located at 0x0200_0000.


Updated E3 Coreplex docs are now posted on dev website.

Great, thanks!

Hello, I now also want to know clint, may I ask what kind of documentary information can provide my reference to learn? Can you provide a website or related pdf file?Thanks

The CLINT is well documented in the E31 Core Complex documents, chapter 8:

I got it. Great benefit, thank you for your reply/