I’m trying to write a QEMU board definition for the HiFive1, and I’ve run into what seems to be an inconsistency between the documentation and the BSP.
In the BSP, bsp/env/freedom-e300-hifive1/init.c:11 defines a function mtime_lo() that reads from CLINT_BASE_ADDR + CLINT_MTIME. The layout described in clint.h seems to line up with the MSIP Registers defined in SiFive-E3-Coreplex-v1.1, section 6.2. However, those registers are located at 0x4400_XXXX in the E3 Coreplex manual, whereas platform.h defines CLINT_BASE_ADDR to be at 0x0200_0000.
Am I missing some documentation for this “CLINT” device? Are the manual and the BSP referring to the same device here?