Arty PL modifications possible?

Just want to double check since I think it’s not possible, but would like to hear from someone.

It is possible to change the PL such as adding a new peripheral to the E300 soft core?

Is that not possible for evaluation version or in general?

Will appreciate any comments,

Best,

You can modify the Arty image used for the Freedom E300 platform, which is open sourced here:

Note that this is somewhat different from the E31/E51 Arty Core IP Evaluation images which you may be asking about, which we don’t support modifying at this time.

You can also use the E31/51 Core IP Evaluation RTL and use your own FPGA flow to place it onto an FPGA with your own peripherals.

Ok, I am actually studying the open source git for doing this but was not sure it was possible.

Is there any tutorial or guide to add new peripheral?

Also, could you let me know if the git version of CPU has the same features/restrictions of the prebuilt version? For example, I need PWM module, it is available ?

Appreciate your comments,

Thank you,

Is there any tutorial or guide to add new peripheral?

We don’t currently maintain a tutorial using the Freedom repo, but you may want to take a look at GitHub - ucb-bar/chipyard: An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more as the procedure is similar.

Also, could you let me know if the git version of CPU has the same features/restrictions of the prebuilt version? For example, I need PWM module, it is available ?

The PWM module is included in the default E300 MCS, and you can see the source code here (which is included in the freedom repo as a library: