I see the HIfive1 Rev B board schematics has support for JTAG & SWD debug port. If I am right, SWD is a ARM specific debug port, why is it in RISC-V hifive board?
The HiFive 1 Rev B board has a USB to Serial and JTAG conversion device as part of the Segger J-Link OB solution for on board debug of the SiFive FE310-G002 device. SWD is used for programming the Segger J-Link OB device.
The SiFive FE310-G002 device does not directly use SWD.
Note that some SiFive devices use cJTAG - but not the FE310-G002.