Problem with programming RISC-V on SmartFusion2

Archive RISC-V
1

I tried to launch RISC-V (E31 Coreplex) on SmartFusion2 ADV, using Libero designs from here: https://github.com/RISCV-on-Microsemi-FPGA/M2S150-Advanced-Dev-Kit

After programming the board I managed to connect with RISC-V in SoftConsole v5.0
(I get the info: RISC-V IDCODE = 0x10e31913 Info : Examined RISCV core; XLEN=32, misa=0x40902223), but when I try to run debug with my simple software, there are only errors about writing to memory.

Did anyone meet this problem?

Thanks,
Mateusz

2

Hi Mateusz,

What is the nature of the error. eg dtminfo or dbus_scan error?

Thanks,
Ciaran

3

Hi,

I get two different errors, shown in the screenshots:

er1.png852×1026 120 KB

4

Are you resetting the board each time before you start a debug session?
That’s required at the moment and mentioned in the SoftConsole v5 release notes.

Regards
Tommy Murphy - Microsemi

5

Yes, I tried both.
Sometimes the message is different (but it disappears just before the ‘load failed’ window):

err3.png700×146 19.6 KB

6

Some more questions:

Are you saying that you can never get a debug connection because of errors or that you can sometimes get a debug connection?

Can you add -d to the OpenOCD command line options in the SoftConsole/Eclipse debug launch configuration and capture the debug/verbose OpenOCD log output and post it please?

Are you using the SmartFusion2 Advanced Development Kit programming file as-is from the Microsemi github or are you running the project through the Libero flow yourself?

Have you modified the Libero project at all?

Have you tried the simple “systick-blinky” example project in the SoftConsole v5 example workspace and did that download/debug/run?

Hope this helps

Regards
Tommy Murphy - Microsemi

7

These questions helped!

I was using Libero project from Github and debugging was not working. But I tried FlashPro Express project and it worked, I could run debug sesion in my project, everything was ok.
I downgraded Libero to v11.7 (earlier I was using v11.7 SP3) and it’s working with the same project from Github.

Thank you for your help,
Mateusz

8

For some reason I wasn’t notified of your reply and only saw it by chance now.
Thanks for posting back about this and glad you got up and running.
I would expect the example project to work even when run through the Libero SoC 11.7 SP3 tools.
I will check this out.

Regards
Tommy Murphy - Microsemi