Hi,
I’m new to the RISC-V open source cpu and I’m very interested in SiFive U54 chip after reading the U500 documentation. I just curious where could I find the chisel configuration file for the U54 chip is and what tag it is in freechips repo?
RISC-V is an open specification, with a free license (BSD) and free from patent claims.
Because RISC-V is BSD licensed people can make open-source implementations and they can also make proprietary implementations.
As you observe, there are free implementations of the RISC-V ISA on freechips or other places such as github, for example rocket-chip, PicoRV32, Bottlerocket, Bonfire, and PULP.
SiFive E3, E5, and U5 are based on rocket-chip, but have proprietary enhancements and, as the BSD license allows, are not open-source.