Hi folks,
I am developing a RISC-V based toolchain, and I am interested in buying the RevB board.
My main reason for getting one is to test my FTDI + OpenOCD toolchain with a working RISC-V debug module. My own setup will eventually include a different RISCV chip with a v0.13 debug module, and a JTAG interface through FTDI. I want to get my hands on a working debug module implementation first.
It is my understanding that the older board had an FTDI interface and the new one has a JLink OB. The older one is more similar to what I actually want to implement, but the fact that it uses v0.11 for its debug module worries me about potential version differences.
The docs for the G002 chip mention the ability to bypass the JLink OB and use an external JTAG header., as shown in:
Has anyone tried this to bypass the JLink and use FTDI with the RevB?
Would you recommend me to do this at all or should I just try to get my hands on one of the older boards, despite the debug module version difference?
If I were to proceed, would I need to desolder anything, or is this bypass simple?
Thanks,
Yunus