How to program PMU in hifive1-revB board?

HiFive1 Rev B
1

I am trying to invoke “sleep” & “wake” through PMU in bare metal assembly.

Here is what I read in FE310 manual:

a. Section 15.5 says writing any value to pmusleep register initiates sleep sequence. The pmusleep register offset is provided in Table 37 with offset value of 0x148. I could n’t find the base address of PMU memory map ( I am not sure if this register is mapped into FE310 as memory mapped register).

If not, how to write into this “pmusleep” register?

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2

Okay, I guess I got it now. I was searching for PMU base address. But the “pmusleep” register’s memory mapped address on FE310 is 0x1000_0000 (AON base address) + 0x148 (pmusleep offset). Am I right?

3

You are correct @bsvtgc the base address of the AON block is 0x10000000 as shown by the SoC Memory Map in Table 4 of FE310-G002 Manual.

Chapter 15 details how the PMU works. The PMU register offsets are shown in Table 37 (an exact replica subset of Table 34), in order of functionality:

0x100-0x11c  pmuwakeup[0-7] (8 program steps, max)
0x120-0x13c  pmusleep[0-7]  (8 program steps, max)
0x14c  pmukey  (write 0x51f15e each time writing a PMU reg)
0x148  pmusleep (trigger the sleep sequence, woken by timer or hw)
0x140  pmuie
0x144  pmucause

Table 38 lists the instruction bit(s) for use in the individual 8 steps of pmuwakeup and pmusleep.

Tables 39 and 40 show the wake and sleep ‘programs’, respectively.

Treat pmucause just as you would mcause in the handler for mtvec.

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