How to get/set CPU clock frequency for HiFive1 Rev. B?

HiFive1 Rev B
1

Are there instructions like get_CPU_clock() resp. set_CPU_clock?

2

Have a look in the Freedom-Metal Documentation.
Thesse are probably the one you are looking for: metal_clock_get_rate_hz and metal_clock_set_rate_hz

3

Yes, I found it. But, a program sample would be helpful.

1 Like
4

@ckuehnel if you’re still looking for an example, I believe this might help - I’ll explain the testing I’ve done below :slight_smile:

#include <metal/machine.h>

	long cpu_clock;

	cpu_clock = metal_clock_get_rate_hz(&__metal_dt_clock_4.clock);
    new_cpu_clock = metal_clock_set_rate_hz(&__metal_dt_clock_4.clock, 32000000L);

The magic there is “&__metal_dt_clock_4.clock”, have a look at bsp/install/include/metal/machine/inline.h for others

I’m pretty-sure this is correct, I tried it on a SparkFun Red-V which is purported to be effectively identical to a HiFive 1 Rev B. Because I have a first-run Red-V, it has a 100k resistor in series with PLLVDD, which means the enabling the PLL … kills it. SparkFun has already shipped a replacement, as well as some 100 ohm resistors so I can re-work my existing board.

To test this code, I did a set_clock to 32MHz and that bricked the Red-V as expected, and I measured PLLVDD as something like 0.69V, as expected. To unbrick the Rev-V, I temporarily jumpered the 100k resistor and re-programmed the FE310 :wink: So I’m certain that setting the PLL clock enables it, I just can’t confirm how accurate it is yet - replacement is due FedEx tomorrow.

It looks like that setting the PLL clock to anything withing 75% - 125% of the 16MHz input frequency results in the PLL being bypassed. It’s important to check the return from set_clock() because you don’t always get what you asked for (but you might get what you need :grin: ) .

Cheers,
Dana K6JQ