I have a typical 24.04.2 LTS and 6.6.77-1-premier linux kernel
Can you advice how to change DRAM freq in HiFIve Premier Linux ?
Before I’ve had some expirience to change DRAM freq on some ARM devices.
The first device have had some multiplicator in DTS. It needs to change DTS and boot with it.
The second device have had own kernel module to change DRAM freq.
Do we have such oportunity/feature in HiFIve Premier too ?
It will be very helpful.
That’s a very good question. Might there also be some DDR control register fields setting the different parts of the refresh interval, such as RAS latency (count) or CAS latency (count)? In that way one could make the DRAM clock periodic asymmetric if desired.
Hello,
Thanks for answer.
Definitely it looks good but the problem in that I’ve already tried to find such documents and I couldn’t.
If you know the links with such documentations it will be very helpful.
It’s nearly impossible. DDR controller and PHY are documented in chapter 4.1 of
https://github.com/eswincomputing/EIC7700X-SoC-Technical-Reference-Manual/releases/download/v1.0.0-20250103/EIC7700X_SoC_Technical_Reference_Manual_Part2.pdf
However it’s VERY complex and I don’t think anyone other than ESWIN or the IP vendor knows how to program it. During boot, there’s a ddr_init binary blob being run on one of the embedded 32bit cores inside EEIC7700 to train DDR memory. It’s close-sourced and proprietary. I’d imagine it’s programming hundreds or thousands of registers. I don’t think ESWIN will ever give you option to “overclock” it, so I personally won’t bother with it.
Thanks for detailed answer.
What a pity.
With a modicum of effort we might be able to disassemble, study, and learn what that ddr_init is doing. Shouldn’t be too hard, because DDR clock rates are typically round decimal numbers like 400MHz, 600MHz, etc. Getting the data sheet from the DRAM chips on board would also give clues, perhaps even sample code from vendor’s Application Notes.