Exception on `csrw`; I'm sure I've missed something :)

HiFive Unmatched
1

I have MSEL set to 0b0_0000 and gdb is showing my program is loaded into L2-LIM.

I can single-step through instructions just fine, until I hit a csrw statement. csrr works fine. I believe I am in Machine mode on the S7 Monitor core. Any ideas what I could have missed?

Minimal reproducible example:

Loading section .text, size 0x10 lma 0x8000000
Loading section .eh_frame, size 0x1c lma 0x8000010
Start address 0x0000000008000000, load size 44
Transfer rate: 3 KB/sec, 22 bytes/write.
(gdb) si
0x0000000008000004 in foo::boot () at src/main.rs:42
42	      asm! { "
   0x0000000008000000 <foo::boot+0>:	37 41 00 08	lui	sp,0x8004
=> 0x0000000008000004 <foo::boot+4>:	16 e0	sd	t0,0(sp)
   0x0000000008000006 <foo::boot+6>:	73 10 00 18	csrw	satp,zero
   0x000000000800000a <foo::boot+10>:	09 a0	j	0x800000c <foo::boot+12>
(gdb) si
0x0000000008000006	42	      asm! { "
   0x0000000008000000 <foo::boot+0>:	37 41 00 08	lui	sp,0x8004
   0x0000000008000004 <foo::boot+4>:	16 e0	sd	t0,0(sp)
=> 0x0000000008000006 <foo::boot+6>:	73 10 00 18	csrw	satp,zero
   0x000000000800000a <foo::boot+10>:	09 a0	j	0x800000c <foo::boot+12>
(gdb) si
0x0000000000000000 in ?? ()
=> 0x0000000000000000:	00 00	unimp
(gdb)
2

SOLVED: A kind soul reminded me that the monitor core doesn’t have S-mode. Retesting writing to mcycle was successful. I knew it was something I’d missed! Leaving here in case it helps someone else in the future.