I’m considering taking on the endeavor of adding support for the SPI header pins on the Microsemi expansion board, I’m wondering if anyone can contribute to my thought bubble on what steps/challenges would need to be taken/faced in doing so? The SiFive document mentions that we can use the three SPI flash interfaces to get stuff from SPI Flash… but where are these pins on the SiFive board?
In the past I’ve made modifications based on https://github.com/westerndigitalcorporation/RISC-V-Linux to add PCIe support through the expansion board but it doesn’t seem anyone has added support for any other of the expansion board peripherals.
If you’re simply looking to add a SPI device to the HiFive Unleashed board, you don’t need to do anything with the MicroSemi board. The FU540’s QSPI1 controller pins are brought out to the low-speed expansion board connector J1 pins 8, 10, 12, and 14. See the board schematics for more information:
You’d need to use a kernel that has the SiFive SPI driver enabled, and you might need to modify the DT data for that kernel to enable the SPI controller and attach SPI slaves.
If, on the other hand, you wanted to work on the MicroSemi expansion board, you’d need to determine whether the SPI connector pins that you’re talking about were allocated for FPGA internal use only (e.g., as a bitstream loading source) or if they were controllable by the FPGA bitstream itself. If the latter, you’d then most likely need to modify the Microsemi bitstream using their Libero toolchain to add a SPI controller IP block that connects to Chiplink.