Timer interrupt in E3 coreplex

In page 14, Section 6.3 of the E3 coreplex manual, there is a sentence as follows:

A timer interrupt is pending whenever the value in a hart’s mtimecmp register is greater than or equal to mtime.

However, in page 8 of Krste’s “Interrupts” presentation, it says “MTIP set when mtime >= mtimecmp”.

Which one is correct?

Thanks for pointing out the discrepancy. Krste’s presentation and the Privileged Spec v. 1.9 are correct: MTIP bit is set when mtime >= mtimecmp. We will correct the E3 Coreplex manual in the next version.