Pin control subsystem

Hi there,

I couldn’t find implementation of pin control subsystem for HiFive Unleashed in it’s device tree binding.

What if a peripheral (like wiznet w5500 in my case) requires pinctrl-names and pinctrl-0 entries in it’s device tree node? Absense of pinctrl node in dts and dtsi files unables us to add a reference to it in dts. Would this module be considered unsupported for HiFive Unleashed?

Hello…there are 17 words of control registers, each word being 32 bits (unsigned int, or uint32_t). Each piece compares to a GPIO pin, so there are 17 control registers for each pin.

While transforming one of the bits of a control register it is significant not to change any of the different bits that you would prefer not to change. Consequently, a read-alter compose worldview, for example, *input_en |= (0x1UL << pin) would set the pinth piece of GPIO_INPUT_EN, where input_en = (uint32_t *) (0x10012000 + 0x04). There are some pleasant get together directions for doing this automatically. See amoand, amoor; and the form pair of guidelines lr and sc.

Hi, thanks for your reply. Sorry for late response. I was moved to another high priority task, so I couldn’t respond.

So basically where are these 17 words available to be configured? Can I call them in device tree and set any GPIO to my desired state in a node and reference that node in pinctrl-0 argument of my device’s required arguments?