I’m having an issue where I experience a hang on high CPU load such as compiling.
I’ve tried Linux 5.6.2 and 5.6.5 with OpenSBI 0.4 - 0.6 with the defconfig provided. I’m using the expansion board and this happens with NVMe or SATA drives. I didn’t experience the issue on my previous setup (Linux 5.2.0, OpenSBI 0.4).
I’ve compared the device trees between both versions, old and new as it might have something to do with it.
--- /dev/fd/3 2020-04-19 11:39:26.936459828 -0400
+++ /dev/fd/0 2020-04-19 11:39:26.934459828 -0400
@@ -7,11 +7,13 @@
model = "SiFive HiFive Unleashed A00";
aliases {
+ ethernet0 = "/soc/ethernet@10090000";
serial0 = "/soc/serial@10010000";
serial1 = "/soc/serial@10011000";
};
chosen {
+ stdout-path = "serial0";
};
cpus {
@@ -20,11 +22,13 @@
timebase-frequency = <0xf4240>;
cpu@0 {
+ clocks = <0x01 0x00>;
compatible = "sifive,e51\0sifive,rocket0\0riscv";
device_type = "cpu";
i-cache-block-size = <0x40>;
i-cache-sets = <0x80>;
i-cache-size = <0x4000>;
+ operating-points-v2 = <0x02>;
reg = <0x00>;
riscv,isa = "rv64imac";
status = "disabled";
@@ -33,11 +37,12 @@
#interrupt-cells = <0x01>;
compatible = "riscv,cpu-intc";
interrupt-controller;
- phandle = <0x01>;
+ phandle = <0x04>;
};
};
cpu@1 {
+ clocks = <0x01 0x00>;
compatible = "sifive,u54-mc\0sifive,rocket0\0riscv";
d-cache-block-size = <0x40>;
d-cache-sets = <0x40>;
@@ -51,6 +56,8 @@
i-tlb-sets = <0x01>;
i-tlb-size = <0x20>;
mmu-type = "riscv,sv39";
+ next-level-cache = <0x03>;
+ operating-points-v2 = <0x02>;
reg = <0x01>;
riscv,isa = "rv64imafdc";
tlb-split;
@@ -59,12 +66,12 @@
#interrupt-cells = <0x01>;
compatible = "riscv,cpu-intc";
interrupt-controller;
- phandle = <0x02>;
+ phandle = <0x05>;
};
};
cpu@2 {
- clock-frequency = <0x00>;
+ clocks = <0x01 0x00>;
compatible = "sifive,u54-mc\0sifive,rocket0\0riscv";
d-cache-block-size = <0x40>;
d-cache-sets = <0x40>;
@@ -78,6 +85,8 @@
i-tlb-sets = <0x01>;
i-tlb-size = <0x20>;
mmu-type = "riscv,sv39";
+ next-level-cache = <0x03>;
+ operating-points-v2 = <0x02>;
reg = <0x02>;
riscv,isa = "rv64imafdc";
tlb-split;
@@ -86,12 +95,12 @@
#interrupt-cells = <0x01>;
compatible = "riscv,cpu-intc";
interrupt-controller;
- phandle = <0x03>;
+ phandle = <0x06>;
};
};
cpu@3 {
- clock-frequency = <0x00>;
+ clocks = <0x01 0x00>;
compatible = "sifive,u54-mc\0sifive,rocket0\0riscv";
d-cache-block-size = <0x40>;
d-cache-sets = <0x40>;
@@ -105,6 +114,8 @@
i-tlb-sets = <0x01>;
i-tlb-size = <0x20>;
mmu-type = "riscv,sv39";
+ next-level-cache = <0x03>;
+ operating-points-v2 = <0x02>;
reg = <0x03>;
riscv,isa = "rv64imafdc";
tlb-split;
@@ -113,12 +124,12 @@
#interrupt-cells = <0x01>;
compatible = "riscv,cpu-intc";
interrupt-controller;
- phandle = <0x04>;
+ phandle = <0x07>;
};
};
cpu@4 {
- clock-frequency = <0x00>;
+ clocks = <0x01 0x00>;
compatible = "sifive,u54-mc\0sifive,rocket0\0riscv";
d-cache-block-size = <0x40>;
d-cache-sets = <0x40>;
@@ -132,6 +143,8 @@
i-tlb-sets = <0x01>;
i-tlb-size = <0x20>;
mmu-type = "riscv,sv39";
+ next-level-cache = <0x03>;
+ operating-points-v2 = <0x02>;
reg = <0x04>;
riscv,isa = "rv64imafdc";
tlb-split;
@@ -140,17 +153,22 @@
#interrupt-cells = <0x01>;
compatible = "riscv,cpu-intc";
interrupt-controller;
- phandle = <0x05>;
+ phandle = <0x08>;
};
};
};
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <0x0f 0x0a 0x01>;
+ };
+
hfclk {
#clock-cells = <0x00>;
clock-frequency = <0x1fca055>;
clock-output-names = "hfclk";
compatible = "fixed-clock";
- phandle = <0x06>;
+ phandle = <0x09>;
};
memory@80000000 {
@@ -158,12 +176,34 @@
reg = <0x00 0x80000000 0x02 0x00>;
};
+ opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x02>;
+
+ opp-1400000000 {
+ opp-hz = <0x00 0x53724e00>;
+ };
+
+ opp-350000000 {
+ opp-hz = <0x00 0x14dc9380>;
+ };
+
+ opp-700000000 {
+ opp-hz = <0x00 0x29b92700>;
+ };
+
+ opp-999999999 {
+ opp-hz = <0x00 0x3b9ac9ff>;
+ };
+ };
+
rtcclk {
#clock-cells = <0x00>;
clock-frequency = <0xf4240>;
clock-output-names = "rtcclk";
compatible = "fixed-clock";
- phandle = <0x07>;
+ phandle = <0x0a>;
};
soc {
@@ -172,41 +212,75 @@
compatible = "sifive,fu540-c000\0sifive,fu540\0simple-bus";
ranges;
+ cache-controller@2010000 {
+ cache-block-size = <0x40>;
+ cache-level = <0x02>;
+ cache-sets = <0x400>;
+ cache-size = <0x200000>;
+ cache-unified;
+ compatible = "sifive,fu540-c000-ccache\0cache";
+ interrupt-parent = <0x0b>;
+ interrupts = <0x01 0x02 0x03>;
+ phandle = <0x03>;
+ reg = <0x00 0x2010000 0x00 0x1000>;
+ };
+
clock-controller@10000000 {
#clock-cells = <0x01>;
- clocks = <0x06 0x07>;
+ clocks = <0x09 0x0a>;
compatible = "sifive,fu540-c000-prci";
- phandle = <0x09>;
+ phandle = <0x01>;
reg = <0x00 0x10000000 0x00 0x1000>;
};
+ dma@3000000 {
+ #dma-cells = <0x01>;
+ compatible = "sifive,fu540-c000-pdma";
+ interrupt-parent = <0x0b>;
+ interrupts = <0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>;
+ reg = <0x00 0x3000000 0x00 0x8000>;
+ };
+
ethernet@10090000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
clock-names = "pclk\0hclk";
- clocks = <0x09 0x02 0x09 0x02>;
- compatible = "sifive,fu540-macb";
- interrupt-parent = <0x08>;
+ clocks = <0x01 0x02 0x01 0x02>;
+ compatible = "sifive,fu540-c000-gem";
+ interrupt-parent = <0x0b>;
interrupts = <0x35>;
local-mac-address = [00 00 00 00 00 00];
- phy-handle = <0x0a>;
+ phy-handle = <0x0c>;
phy-mode = "gmii";
reg = <0x00 0x10090000 0x00 0x2000 0x00 0x100a0000 0x00 0x1000>;
- reg-names = "control";
status = "okay";
ethernet-phy@0 {
- phandle = <0x0a>;
+ phandle = <0x0c>;
reg = <0x00>;
};
};
+ gpio@10060000 {
+ #gpio-cells = <0x02>;
+ #interrupt-cells = <0x02>;
+ clocks = <0x01 0x03>;
+ compatible = "sifive,fu540-c000-gpio\0sifive,gpio0";
+ gpio-controller;
+ interrupt-controller;
+ interrupt-parent = <0x0b>;
+ interrupts = <0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16>;
+ phandle = <0x0f>;
+ reg = <0x00 0x10060000 0x00 0x1000>;
+ status = "okay";
+ };
+
i2c@10030000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-i2c\0sifive,i2c0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x32>;
reg = <0x00 0x10030000 0x00 0x1000>;
reg-io-width = <0x01>;
@@ -218,8 +292,8 @@
#interrupt-cells = <0x01>;
compatible = "sifive,plic-1.0.0";
interrupt-controller;
- interrupts-extended = <0x01 0xffffffff 0x02 0xffffffff 0x02 0x09 0x03 0xffffffff 0x03 0x09 0x04 0xffffffff 0x04 0x09 0x05 0xffffffff 0x05 0x09>;
- phandle = <0x08>;
+ interrupts-extended = <0x04 0xffffffff 0x05 0xffffffff 0x05 0x09 0x06 0xffffffff 0x06 0x09 0x07 0xffffffff 0x07 0x09 0x08 0xffffffff 0x08 0x09>;
+ phandle = <0x0b>;
reg = <0x00 0xc000000 0x00 0x4000000>;
riscv,ndev = <0x35>;
};
@@ -231,9 +305,9 @@
bus-range = <0x01 0x7f>;
compatible = "microsemi,ms-pf-axi-pcie-host";
device_type = "pci";
- interrupt-map = <0x00 0x00 0x00 0x01 0x0b 0x00 0x00 0x00 0x00 0x02 0x0b 0x01 0x00 0x00 0x00 0x03 0x0b 0x02 0x00 0x00 0x00 0x04 0x0b 0x03>;
+ interrupt-map = <0x00 0x00 0x00 0x01 0x0e 0x00 0x00 0x00 0x00 0x02 0x0e 0x01 0x00 0x00 0x00 0x03 0x0e 0x02 0x00 0x00 0x00 0x04 0x0e 0x03>;
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x20>;
ranges = <0x3000000 0x00 0x40000000 0x00 0x40000000 0x00 0x20000000>;
reg = <0x20 0x30000000 0x00 0x4000000 0x20 0x00 0x00 0x100000>;
@@ -243,23 +317,80 @@
#address-cells = <0x00>;
#interrupt-cells = <0x01>;
interrupt-controller;
- phandle = <0x0b>;
+ phandle = <0x0e>;
+ };
+ };
+
+ pwm@10020000 {
+ #pwm-cells = <0x03>;
+ clocks = <0x01 0x03>;
+ compatible = "sifive,fu540-c000-pwm\0sifive,pwm0";
+ interrupt-parent = <0x0b>;
+ interrupts = <0x2a 0x2b 0x2c 0x2d>;
+ phandle = <0x0d>;
+ reg = <0x00 0x10020000 0x00 0x1000>;
+ status = "okay";
+ };
+
+ pwm@10021000 {
+ #pwm-cells = <0x03>;
+ clocks = <0x01 0x03>;
+ compatible = "sifive,fu540-c000-pwm\0sifive,pwm0";
+ interrupt-parent = <0x0b>;
+ interrupts = <0x2e 0x2f 0x30 0x31>;
+ reg = <0x00 0x10021000 0x00 0x1000>;
+ status = "okay";
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+
+ d1 {
+ active-low = <0x01>;
+ label = "green:d1";
+ linux,default-trigger = "none";
+ max-brightness = <0xff>;
+ pwms = <0x0d 0x00 0x773594 0x00>;
+ };
+
+ d2 {
+ active-low = <0x01>;
+ label = "green:d2";
+ linux,default-trigger = "none";
+ max-brightness = <0xff>;
+ pwms = <0x0d 0x01 0x773594 0x00>;
+ };
+
+ d3 {
+ active-low = <0x01>;
+ label = "green:d3";
+ linux,default-trigger = "none";
+ max-brightness = <0xff>;
+ pwms = <0x0d 0x02 0x773594 0x00>;
+ };
+
+ d4 {
+ active-low = <0x01>;
+ label = "green:d4";
+ linux,default-trigger = "none";
+ max-brightness = <0xff>;
+ pwms = <0x0d 0x03 0x773594 0x00>;
};
};
serial@10010000 {
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-uart\0sifive,uart0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x04>;
reg = <0x00 0x10010000 0x00 0x1000>;
status = "okay";
};
serial@10011000 {
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-uart\0sifive,uart0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x05>;
reg = <0x00 0x10011000 0x00 0x1000>;
status = "okay";
@@ -268,9 +399,9 @@
spi@10040000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-spi\0sifive,spi0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x33>;
reg = <0x00 0x10040000 0x00 0x1000 0x00 0x20000000 0x00 0x10000000>;
status = "okay";
@@ -288,9 +419,9 @@
spi@10041000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-spi\0sifive,spi0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x34>;
reg = <0x00 0x10041000 0x00 0x1000 0x00 0x30000000 0x00 0x10000000>;
status = "disabled";
@@ -299,9 +430,9 @@
spi@10050000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
- clocks = <0x09 0x03>;
+ clocks = <0x01 0x03>;
compatible = "sifive,fu540-c000-spi\0sifive,spi0";
- interrupt-parent = <0x08>;
+ interrupt-parent = <0x0b>;
interrupts = <0x06>;
reg = <0x00 0x10050000 0x00 0x1000>;
status = "okay";