# Why IRQ affinity failed?

**URL:** <https://forums.sifive.com/t/why-irq-affinity-failed/1862>\
**Category:** HiFive Unleashed\
**Created:** [December 12, 2018, 5:47am UTC](https://forums.sifive.com/t/why-irq-affinity-failed/1862 "2018-12-12T05:47:26Z")\
**Posts on this page:** 3\
**Page:** 1

<div class="post-metadata">

**Author:** ![daiw](https://avatars.discourse-cdn.com/v4/letter/d/3da27b/32.png) [@daiw](https://forums.sifive.com/u/daiw)\
**Post date:** [December 12, 2018, 5:47am UTC](https://forums.sifive.com/t/why-irq-affinity-failed/1862/1 "2018-12-12T05:47:26Z")

</div>

On HiFive unleashed board, Why I can’t set IRQ affnity. Following are my commands.

# cat /proc/interrupts

```
       CPU1 CPU2 CPU3 CPU4       

```

21: 13 29 34 26 riscv,plic0,c000000 53 eth0  
37: 0 0 0 0 riscv,plic0,c000000 32 xilinx-pcie  
43: 8 21 29 22 riscv,plic0,c000000 4 10010000.serial  
44: 0 0 0 0 riscv,plic0,c000000 5 10011000.serial  
45: 0 0 0 0 riscv,plic0,c000000 51 10040000.spi  
46: 0 0 0 0 riscv,plic0,c000000 52 10041000.spi  
47: 3 11 48 40 riscv,plic0,c000000 6 10050000.spi  
48: 0 0 0 0 sifive-gpio 11 spi2.0 cd

# echo 8 \> /proc/irq/21/smp\_affinity

sh: write error: Input/output error

# uname -a

Linux buildroot 4.15.0-00044-g2b0aa1d #1 SMP Tue Mar 20 12:18:35 PDT 2018 riscv64 GNU/Linux

#

---

<div class="post-metadata">

**Author:** ![terpstra](https://avatars.discourse-cdn.com/v4/letter/t/7c8e57/32.png) [@terpstra](https://forums.sifive.com/u/terpstra)\
**Post date:** [December 12, 2018, 6:23pm UTC](https://forums.sifive.com/t/why-irq-affinity-failed/1862/2 "2018-12-12T18:23:25Z")

</div>

I think we don’t support this yet. @paulw

---

<div class="post-metadata">

**Author:** ![daiw](https://avatars.discourse-cdn.com/v4/letter/d/3da27b/32.png) [@daiw](https://forums.sifive.com/u/daiw)\
**Post date:** [December 15, 2018, 11:24am UTC](https://forums.sifive.com/t/why-irq-affinity-failed/1862/3 "2018-12-15T11:24:43Z")

</div>

Thanks a lot for your feedback.