SPI FIFO Buffer


#1

Is there more information anywhere about the size of the SPI FIFO buffer on the FE310-g002? I am curious to know more details such as the depth of the buffer. The UART peripheral is specified as having TX & RX FIFOs with depths of 8 (pg. 79 of the manual) but the SPI peripheral has no such matching information. Am I just not looking in the right place?

Also, what are the units of the watermark values (txmark and remark)? I assume bytes?


(Paul Sherman) #2

The TXMARK and RXMARK fields (on pages 91 and 92 of the manual) are each three bits, so it is good assumption that the FIFO depths are maximally eight bytes, at least when the frame size (LEN) is 8 bits-per-frame.

Good question you ask; for other frame sizes such as 4 bits-per-frame, it is not clear whether the units of the watermark registers are ‘bits’ or ‘frames’. This would be an excellent point to demonstrate or study.