# SoC based in· E24 Core

**URL:** <https://forums.sifive.com/t/soc-based-in-e24-core/4125>\
**Category:** RISC-V\
**Created:** [October 21, 2020, 9:46am UTC](https://forums.sifive.com/t/soc-based-in-e24-core/4125 "2020-10-21T09:46:32Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![pablo1997](https://avatars.discourse-cdn.com/v4/letter/p/35a633/32.png) [@pablo1997](https://forums.sifive.com/u/pablo1997)\
**Post date:** [October 21, 2020, 9:46am UTC](https://forums.sifive.com/t/soc-based-in-e24-core/4125/1 "2020-10-21T09:46:32Z")

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Hi,

I would like to know if it is possible to develope a basic SoC based in a SiFiveE24 with the rtl code?

I would like to do it, adding it as a rtl module to a Vivado block design.

Thanks