#  Litex-VexRiscv and Rocket chip

**URL:** <https://forums.sifive.com/t/litex-vexriscv-and-rocket-chip/5066>\
**Category:** HiFive1 Rev B\
**Created:** [August 11, 2021, 4:17pm UTC](https://forums.sifive.com/t/litex-vexriscv-and-rocket-chip/5066 "2021-08-11T16:17:22Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![Shiva](https://avatars.discourse-cdn.com/v4/letter/s/85e7bf/32.png) [@Shiva](https://forums.sifive.com/u/Shiva)\
**Post date:** [August 11, 2021, 4:17pm UTC](https://forums.sifive.com/t/litex-vexriscv-and-rocket-chip/5066/1 "2021-08-11T16:17:22Z")

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Hi Team,  
From the ASIC point of view which is the best one, Litex-VexRiscv or Rocket chip?  
Is there any documentation available for the comparison of these two? I am a bit confused about these two cores. 🙄

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**Author:** ![jimw](https://avatars.discourse-cdn.com/v4/letter/j/f14d63/32.png) [@jimw](https://forums.sifive.com/u/jimw)\
**Post date:** [August 11, 2021, 4:23pm UTC](https://forums.sifive.com/t/litex-vexriscv-and-rocket-chip/5066/2 "2021-08-11T16:23:33Z")

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This is off topic.

Maybe ask on the #riscv IRC channel at Libera. I think the VexRiscv author hangs out there. Or ask in the rocket chip github tree. You can file an issue in a github tree to ask questions. Or ask on the RISC-V International hw-dev mailing list as this is a hardware question.

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**Author:** ![Shiva](https://avatars.discourse-cdn.com/v4/letter/s/85e7bf/32.png) [@Shiva](https://forums.sifive.com/u/Shiva)\
**Post date:** [August 11, 2021, 5:35pm UTC](https://forums.sifive.com/t/litex-vexriscv-and-rocket-chip/5066/3 "2021-08-11T17:35:09Z")

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Great! Thanks